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41.发明公开
公开(公告)号：KR1020120071435A
公开(公告)日：2012-07-03
申请号：KR1020100132982
申请日：2010-12-23
Applicant: 한국과학기술원
IPC: H01L21/768
CPC classification number: H05K1/0236 , H05K2201/09309
Abstract: PURPOSE: An electromagnetic band gap structure having an active element, a semiconductor chip including the same, and a method of manufacturing an electromagnetic band gap structure are provided to efficiently reduce SSN(Simultaneous Switching Noise) by easily controlling a frequency range of a stop band. CONSTITUTION: An MOS(Metal Oxide Semiconductor) capacitor(120) is formed on a surface of a semiconductor substrate(110). A first power transfer layer(130) is arranged on the top of an area on which the MOS capacitor is formed. The first power transfer layer includes a plurality of first ground lines(132) and a plurality of first power source lines(134). A second power transfer layer(140) is arranged on the top of the first power transfer layer. The second power transfer layer includes a plurality of second ground lines(142) and a plurality of second power lines(144).
Abstract translation: 目的：提供具有有源元件的电磁带隙结构，包括该有源元件的半导体芯片以及制造电磁带隙结构的方法，通过容易地控制阻带的频率范围来有效降低SSN（同时开关噪声） 。 构成：在半导体衬底（110）的表面上形成MOS（金属氧化物半导体）电容器120。 第一电力传输层（130）布置在其上形成有MOS电容器的区域的顶部。 第一功率传输层包括多个第一接地线（132）和多个第一电源线（134）。 第二电力传输层（140）布置在第一电力传输层的顶部。 第二功率传输层包括多个第二接地线（142）和多个第二电源线（144）。
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公开(公告)号：KR1020120070077A
公开(公告)日：2012-06-29
申请号：KR1020100131486
申请日：2010-12-21
Applicant: 한국과학기술원
IPC: H01L23/48 , H01L23/045 , H01L23/055
CPC classification number: H01L24/73 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2924/14 , H01L2924/15311 , H01L2924/30107 , H01L2924/00012 , H01L2924/00
Abstract: PURPOSE: A 3D integrated circuit including a power pin and a method for arranging the power pin are provided to reduce inductance of power pins by arranging pins with the same polarity in a row. CONSTITUTION: First power pins(751,752,753) are arranged on one or more circuit boards(710,720,730,740) with a first interval in a first direction(D1). Second power pins(761,762,763) are separated from the first power pins in a second direction which is orthogonal to the first direction and are arranged on one or more circuit boards with a second interval in the first direction. The polarities of the second power pins are opposite to the polarities of the first power pins. The first interval is equal to the second interval.
Abstract translation: 目的：提供一种包括电源引脚和用于布置电源引脚的方法的3D集成电路，以通过以相同极性排列排列来降低电源引脚的电感。 构成：第一电源引脚（751,752,753）以第一方向（D1）的第一间隔布置在一个或多个电路板（710,720,730,740）上。 第二电源引脚（761,762,763）在与第一方向正交的第二方向上与第一电源引脚分离，并且在第一方向上以第二间隔布置在一个或多个电路板上。 第二电源引脚的极性与第一电源引脚的极性相反。 第一个间隔等于第二个间隔。
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公开(公告)号：KR101156034B1
公开(公告)日：2012-06-18
申请号：KR1020100068470
申请日：2010-07-15
Applicant: 한국과학기술원
CPC classification number: G06F17/50 , B60L5/005 , B60L11/182 , B60L2200/26 , B60L2250/16 , B60L2270/147 , B60M7/003 , H02J5/005 , H02J7/025 , H02J50/12 , H02J50/40 , H02J50/70 , Y02T10/7005 , Y02T10/7072 , Y02T90/122 , Y02T90/14
Abstract: 집전장치를 갖는 차량에 무선으로 전력을 공급하기 위한 급전장치를 설계하는 방법이 제공된다. 설계 방법은 급전장치의 인접하는 두 자극 사이의 간격을 입력받는 후에, 두 자극 사이의 간격에 기초하여 급전장치와 집전장치 사이의 간격을 결정한다. 다음으로, 급전장치와 집전장치 사이의 간격 및 상기 자기장의 크기에 대해 요구되는 값에 기초하여 급전장치에 공급될 전력의 크기를 결정한다.
이러한 설계 방법에 따르면, 각 기능적 요구 사항이 서로 디커플되어 있기 때문에, 급전장치를 용이하게 설계할 수 있다.-
公开(公告)号：KR101062848B1
公开(公告)日：2011-09-07
申请号：KR1020090048140
申请日：2009-06-01
Applicant: 에스케이하이닉스 주식회사 , 한국과학기술원
CPC classification number: H01L2924/0002 , H01L2924/00
Abstract: 본 발명은 관통실리콘비아간의 크로스토크를 차폐하고 기판노이즈를 최소화할 수 있는 반도체칩을 제공하기 위한 것으로, 본 발명의 반도체칩은 실리콘기판; 상기 실리콘기판을 관통하는 복수의 관통실리콘비아; 및 적어도 어느 하나의 상기 관통실리콘비아의 주변을 에워싸는 크로스토크쉴딩부를 포함하고, 상술한 본 발명은 관통실리콘비아의 주변을 에워싸는 크로스토크쉴딩부를 구비함으로써 관통실리콘비아간의 크로스토크를 방지할 수 있는 효과가 있으며, 또한, 본 발명은 캐패시터를 이용하여 관통실리콘비아의 주변을 에워쌈으로써 관통실리콘비아간의 크로스토크 및 기판노이즈를 방지할 수 있는 효과가 있다.
반도체패키지, 관통실리콘비아, 크로스토크, 노이즈, 인터비아-
公开(公告)号：KR101010596B1
公开(公告)日：2011-01-24
申请号：KR1020090116730
申请日：2009-11-30
Applicant: 한국과학기술원
CPC classification number: H04B3/04 , H04L25/03878
Abstract: PURPOSE: An equalizer and a communications device having wide bandwidth are provided to make the equalizer small without consuming power. CONSTITUTION: A terminating register is connected between the end part of stub and a ground plane arranged in the bottom surface of a dielectric layer. A defected ground structure is located on a ground plane. The defected ground structure has the shape in which the ground plane of the vertical downward is partially eliminated. The characteristic impedance of the stub is bigger than the impedance of the terminating resistance. The characteristic impedance of stub is bigger than the characteristic impedance of the transmission line.
Abstract translation: 目的：提供均衡器和具有宽带宽的通信设备，以使均衡器小而不消耗电力。 构成：终端寄存器连接在短截线端部与布置在电介质层底面的接地面之间。 缺陷的地面结构位于地平面上。 缺陷的地面结构具有垂直向下的接地平面被部分消除的形状。 短截线的特征阻抗大于端接电阻的阻抗。 短截线的特征阻抗大于传输线的特性阻抗。
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Patent Agency Ranking
公开(公告)号：KR1020100070417A
公开(公告)日：2010-06-28
申请号：KR1020080128951
申请日：2008-12-18
Applicant: 한국과학기술원
Abstract: PURPOSE: An apparatus and a method for generating signal with a dual slope are provided to reduce electromagnetic interference by generating the signal with a dual ascending slope and a dual descending slope. CONSTITUTION: A signal ascending unit(210) raises input signal to a middle level, which is the mid-point of a high level and a low level, with a first slope during a first phase. The signal ascending unit raises the input signal to the high level with a second slope, which is larger than the first slope, during a second phase. A level maintaining unit(250) maintains the input signal during a third phase. The signal descending unit(230) drops the input signal to the middle level with the first slope during a fourth phase. The signal descending unit drops the input signal to the low level with the second slope during a fifth phase.
Abstract translation: 目的：提供一种用于产生具有双斜率的信号的装置和方法，以通过以双上升斜率和双下降斜率产生信号来减小电磁干扰。 构成：在第一阶段期间，信号上升单元（210）将输入信号提升到具有第一斜率的中间电平，其是高电平和低电平的中点。 信号上升单元在第二阶段期间以大于第一斜率的第二斜率将输入信号提升到高电平。 电平维持单元（250）在第三阶段期间维持输入信号。 信号下降单元（230）在第四阶段期间以第一斜率将输入信号降低到中间电平。 信号下降单元在第五阶段期间以第二斜率将输入信号降低到低电平。
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公开(公告)号：KR100963593B1
公开(公告)日：2010-06-15
申请号：KR1020080033490
申请日：2008-04-11
Applicant: 한국과학기술원
CPC classification number: H01L2224/16145 , H01L2224/48091 , H01L2224/73257 , H01L2924/10253 , H01L2924/00014 , H01L2924/00
Abstract: 적층칩 패키지는 반도체 기판, 복수의 반도체 칩들, 제1 관통 웨이퍼 비아들 및 제2 관통 웨이퍼 비아들을 포함한다. 복수의 반도체 칩들은 반도체 기판 상에 적층되고, 복수의 제1 관통 웨이퍼 비아들은 복수의 반도체 칩들의 제1 동일 좌표 상에 형성되어 반도체 칩들을 관통하며 고주파 신호를 전송하고, 복수의 제2 관통 웨이퍼 비아들은 복수의 제1 웨이퍼 비아들이 위치한 좌표와 다른 제2 동일 좌표 상에 형성되어 반도체 칩들을 관통하며 이산화규소(SiO
2 )막으로 둘러싸여 저주파 신호를 전송하는 복수의 제2 관통 웨이퍼 비아들을 포함하여 주파수 대역에 관계없이 안정되고 깨끗한 신호를 전달할 수 있다.-
公开(公告)号：KR1020090070435A
公开(公告)日：2009-07-01
申请号：KR1020070138448
申请日：2007-12-27
Applicant: 한국과학기술원
CPC classification number: H05K9/0064 , H01L23/60 , H05K9/0067 , H05K9/0071
Abstract: A mixed mode system-in-package is provided to prevent damage to an ultra high frequency signal by using a ground grid via or a power grid via. A mixed mode system-in-package(100) includes a ground flat layer(120), a signal flat layer(110), a dielectric layer(130), and a ground grid via(170). The signal flat layer is positioned on a layer different from the ground flat layer. The signal flat layer includes an ultra high frequency signal line(140) and a digital signal line(150). The dielectric layer is positioned between the ground flat layer and the signal flat layer. The ground grid via is connected to the ground flat layer and the signal flat layer through the dielectric layer. The ground grid via is positioned between the ultra high frequency signal line and the digital signal line. The ground grid via is more nearly positioned in the ultra high frequency signal line than the digital signal line.
Abstract translation: 提供混合模式系统级封装，以通过使用接地网格或电网通孔来防止对超高频信号的损坏。 混合模式系统级封装（100）包括接地平坦层（120），信号平坦层（110），介电层（130）和接地栅格通孔（170）。 信号平坦层位于与地面平坦层不同的层上。 信号平坦层包括超高频信号线（140）和数字信号线（150）。 电介质层位于接地平面层和信号平面层之间。 接地网格通过介电层连接到地平面层和信号平面层。 接地网格通孔位于超高频信号线和数字信号线之间。 地电网通道比数字信号线更接近于超高频信号线。
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公开(公告)号：KR1020090014905A
公开(公告)日：2009-02-11
申请号：KR1020070079238
申请日：2007-08-07
IPC: H04L1/00
CPC classification number: H04B3/36
Abstract: An apparatus for network-coding and a method thereof are provided to increase data transmission capacity by transmitting signals combined with simple calculation. A received signal processor decodes two or more received signals. Two or more decoded received signals are input to a transmitted signal processor(120) from the received signal processor. The transmitted signal processor combines two or more decoded received signals and produces one combined transmitted signal. The transmitted signal processor comprises a combining unit and RSC(Recursive Systematic Convolutional) encoder. Two or more decoded received signals are input to the combining unit(410) from an interleaver. By performing the XOR(Exclusive OR) calculation about the decoded received signal the combining unit produces a combined application signal. The combined application signal is input to the RSC encoder(420). The RSC encoder produces the combined transmitted signal by encoding the combined application signal.
Abstract translation: 提供一种用于网络编码的装置及其方法，通过发送与简单计算结合的信号来增加数据传输容量。 接收到的信号处理器解码两个或更多个接收到的信号。 两个或多个解码的接收信号从接收到的信号处理器输入到发射信号处理器（120）。 发射信号处理器组合两个或多个解码的接收信号并产生一个组合的发射信号。 发送信号处理器包括组合单元和RSC（递归系统卷积）编码器。 两个或多个解码的接收信号从交织器输入到组合单元（410）。 通过对解码的接收信号执行XOR（异或）计算，组合单元产生组合的应用信号。 组合的应用信号被输入到RSC编码器（420）。 RSC编码器通过对组合的应用信号进行编码来产生组合的发送信号。
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公开(公告)号：KR1020080102448A
公开(公告)日：2008-11-26
申请号：KR1020070048958
申请日：2007-05-21
CPC classification number: H04L25/03 , H04B1/10 , H04B1/18 , H04B1/71637
Abstract: An ultra wideband impulse signal receiver and a triggering circuit recover the ultra wideband impulse signal to a digital signal by using the triggering circuit composed of an amplifier and an inverter. A low noise amplifier(130) is used for amplifying the ultra-wideband impulse signal received from the outside. An envelope detector(140) is used for outputting the detected analog signal by detecting the envelop of the amplified ultra-wideband impulse signal. An ultra wideband impulse signal receiver(100) includes a triggering circuit(150) converting the detected analog signal into the digital signal. An ultra wideband antenna(110) is used for receiving the ultra-wideband impulse signal from the outside.
Abstract translation: 超宽带脉冲信号接收器和触发电路通过使用由放大器和反相器组成的触发电路将超宽带脉冲信号恢复到数字信号。 低噪声放大器（130）用于放大从外部接收的超宽带脉冲信号。 包络检测器（140）用于通过检测放大的超宽带脉冲信号的包络来输出检测到的模拟信号。 超宽带脉冲信号接收器（100）包括将检测到的模拟信号转换成数字信号的触发电路（150）。 超宽带天线（110）用于从外部接收超宽带脉冲信号。
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