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公开(公告)号：KR1020110033383A
公开(公告)日：2011-03-31
申请号：KR1020090090863
申请日：2009-09-25
Applicant: 전자부품연구원
CPC classification number: H03F1/0288 , H03F1/56 , H03F3/211 , H03F3/2176 , H03F3/602 , H03F2200/543
Abstract: PURPOSE: A class-F and inverse class-F doherty amplifier are provided to combine a doherty amplifier and a class F with a power amplifier, thereby obtaining maximum efficiency at a back-off spot. CONSTITUTION: An asymmetrical power distributer(100) asymmetrically distributes inputted RF signals to a main amplifier and at least one peaking amplifier respectively. An input matching unit(200) matches input impedance of the peaking amplifier and a main amplifier. An output matching unit(600) matches each output impedance of the main amplifier and the peaking amplifier. First and second 1/4 wavelength transmitting lines(700,800) are connected to an output terminal of the output matching unit.
Abstract translation: 目的：提供了一个F类和F类反向放大器，用于将功率放大器和F类功率放大器组合在一起，从而在退避点获得最大的效率。 构成：不对称功率分配器（100）将输入的RF信号不对称地分配到主放大器和至少一个峰值放大器。 输入匹配单元（200）匹配峰值放大器和主放大器的输入阻抗。 输出匹配单元（600）匹配主放大器和峰化放大器的每个输出阻抗。 第一和第二1/4波长传输线（700,800）连接到输出匹配单元的输出端。
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公开(公告)号：KR1020100122258A
公开(公告)日：2010-11-22
申请号：KR1020090041209
申请日：2009-05-12
Applicant: 전자부품연구원
IPC: H01P1/205
CPC classification number: H01P1/205 , H01P1/2088 , H01P7/065 , H05K1/0221
Abstract: PURPOSE: The ultra-wideband construct of filter and printed circuit board including the same directly embodies the construct of filter in the printed circuit board used for the specific module. The chip filter purchasing cost and chip filter built-in cost are reduced. CONSTITUTION: In the lowest side(100) and top surface(700) of the PCB substrate, the front side ground metal pattern is formed. The resonator circuit pattern is formed in the second metal layer of the second dielectric layer(400) top. Capacitors for the matching property improvement are formed in the first metal layer of the first dielectric layer(200) top.
Abstract translation: 目的：过滤器和印刷电路板的超宽带结构包括相同的直接体现了用于特定模块的印刷电路板中的滤波器结构。 芯片滤波器采购成本和芯片滤波器内置成本降低。 构成：在PCB基板的最下面（100）和顶面（700）上，形成前侧接地金属图案。 谐振器电路图案形成在第二介电层（400）顶部的第二金属层中。 用于匹配性能改进的电容器形成在第一介电层（200）顶部的第一金属层中。
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公开(公告)号：KR1020100077277A
公开(公告)日：2010-07-08
申请号：KR1020080135182
申请日：2008-12-29
Applicant: 전자부품연구원
Inventor： 유찬세
CPC classification number: H03H9/205 , H01P1/20336 , H01P1/20381 , H03H9/25 , H03H17/0671
Abstract: PURPOSE: A comb line filter is provided to form the outside quality factor of the high value and the wide range by constituting an input terminal and output terminal with capacitive coupled. CONSTITUTION: Two or more resonators(300-1-300-N) comprises the predetermined width and the length. The one side end part of resonator is connected to ground. The other side end part of resonator is connected through a capacitor(C31-C3N) to ground. An input terminal(310) and output terminal(320) are combined with capacity in the resonator. A first to third dielectric substrates are successively laminated. A ground layer pattern is formed on the upper side of a first dielectric substrate. A pattern of the input terminal and pattern of the output terminal are formed in the upper side of a second dielectric substrate. The pattern of capacitor comprises the predetermined capacitance between the ground layer patterns. At least two or more resonator patterns are formed in the upper side of a third dielectric substrate. It is connected to the pattern of capacitor and the ground layer pattern continued the resonator pattern.
Abstract translation: 目的：提供梳状滤波器，通过构成具有电容耦合的输入端子和输出端子来形成高值和宽范围的外部品质因数。 构成：两个或多个谐振器（300-1-300-N）包括预定的宽度和长度。 谐振器的一侧端部接地。 谐振器的另一侧端部通过电容器（C31-C3N）连接到地。 输入端（310）和输出端（320）与谐振器中的容量相结合。 依次层压第一至第三电介质基片。 在第一电介质基板的上侧形成接地层图案。 输出端子的输入端子和图案的图案形成在第二电介质基板的上侧。 电容器的图案包括接地层图案之间的预定电容。 在第三电介质基板的上侧形成有至少两个以上的谐振器图案。 它连接到电容器的图案，接地层图案继续谐振器图案。
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公开(公告)号：KR1020090072100A
公开(公告)日：2009-07-02
申请号：KR1020070140098
申请日：2007-12-28
Applicant: 전자부품연구원
Abstract: A chip antenna for UWB(Ultra Wide Band) is provided to reduce an antenna size by performing a laminated type chip antenna using high dielectric constant material. A radiation device(100) has a multilayer structure. The radiation device comprises a top plate dielectric(101), a bottom plate dielectric(103), and a metal pattern(102). The metal pattern is interposed between the top plate dielectric and the bottom plate dielectric. A feed line(200) is connected to the radiation device. The feed line is formed into a micro strip shape. A dielectric substrate(500) is arranged between a top ground plane(301) and a bottom ground plane(302). A top via(401) for feeding connects the radiation device to the feed line. A bottom via(402) for feeding connects the feed line, the dielectric substrate, and a bottom ground plane. A dummy pad(600) attaches the radiation device to the dielectric substrate.
Abstract translation: 提供了一种用于UWB（超宽带）的芯片天线，通过使用高介电常数材料执行层叠型芯片天线来减小天线尺寸。 辐射装置（100）具有多层结构。 辐射装置包括顶板电介质（101），底板电介质（103）和金属图案（102）。 金属图案插入在顶板电介质和底板电介质之间。 馈线（200）连接到辐射装置。 供给线形成为微带状。 电介质基板（500）设置在顶部接地平面（301）和底部接地平面（302）之间。 用于进给的顶部通孔（401）将辐射装置连接到进料管线。 用于进给的底部通孔（402）连接馈电线，电介质基底和底部接地平面。 虚拟焊盘（600）将辐射装置附接到电介质基板。
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公开(公告)号：KR100563892B1
公开(公告)日：2006-03-24
申请号：KR1020030057422
申请日：2003-08-20
Applicant: 전자부품연구원
IPC: H04B1/40
Abstract: 본 발명은, 듀얼 밴드 이동 통신 단말기의 전압 제어 발진기에 관한 것으로서, 인덕터나, 커패시터 등의 전압 제어 발진기용 단위 소자들이 PCB기판에 칩 부품 형태로 실장되는 종래의 2차원적인 구조와는 달리, 관련 단위 소자들이 유전체 기판, 예컨대 세라믹 시트(sheet)를 적층하고 일체화시켜 3차원적인 구조로 형성함으로써, 종래와 같이 칩부품을 사용하지 않아도 되어 칩부품 비용과 그 실장 비용을 절감할 수 있고, 3차원적으로 모듈을 제조할 수 있어 그 크기를 종래의 스위칭 소자보다 최소화할 수 있도록 하며, 더불어 최상면의 유전체 기판에는, 개별 전압 제어 발진기 각각에 사용되는 공진 주파수 조절용의 커패시터 패턴을 인쇄하여 튜닝(tuning)이 종래 보다 쉽게 가능하도록 한다.
듀얼, 밴드, 적층, 전압, 발진기, 유전체, 기판, 세라믹-
Patent Agency Ranking
公开(公告)号：KR100553369B1
公开(公告)日：2006-02-20
申请号：KR1020030098926
申请日：2003-12-29
Applicant: 전자부품연구원
IPC: H03F1/00
Abstract: 본 발명은 듀얼밴드 파워증폭기 모듈에 관한 것으로서, 칩인덕터와 칩 커패시터들 그리고 RFC를 세라믹 기판을 사용해 3차원적으로 적층 및 형성함으로써 모듈전체의 크기를 줄이도록 하는데, 이를 위해 상호간에 일정거리만큼 이격되도록 제1주파수대역의 파워증폭용MMIC와 제2주파수대역의 파워증폭용MMIC가 실장되는 각각의 위치에 소정의 전극패턴이 형성되며, 해당 주파수대역의 파워증폭용MMIC 각각의 양측에 입력매칭부와 출력매칭부의 소자기준전극패턴이 형성된 최상부레이어부;상기 최상부레이어부의 하부에, 상기 입력매칭부와 출력매칭부의 소자기준전극패턴과 대응되는 소정의 전극패턴이, 형성된 레이어를 원하는 값에 따라 다수개 적층 및 연결하여 형성한, 입/출력매칭레이어부;상기 입/출력매칭레이어부의 하부에 DC바이어스 인가용 RFC(Radio Frequency Choke)스트립 패턴이 형성된 레이어를 다수개 적층 및 연결하여 형성한, RFC 레이어부;상기 RFC레이어부의 하부에 상기 스트립 패턴과 연동하여 DC 바이어스 회로를 구성하는 소정의 바이패스 커패시터 패턴이 형성된 레이어를 다수개 적층 및 연결하여 형성한, 바이패스 레이어부;상기 바이패스 레이어부의 하부에 외부의 입/출력포트와 인터페이스하도록 소정의 전극패턴이 형성된 인터페이스 레이어부를 포함하여 이루어지도록 한다.
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公开(公告)号：KR100500391B1
公开(公告)日：2005-07-18
申请号：KR1020030032074
申请日：2003-05-20
Applicant: 전자부품연구원
IPC: H03H9/56
Abstract: 본 발명은 박막형 체적 탄성 공진기(Film Bulk Acoustic Resonator :FBAR)필터를 사용한 듀플렉싱 모듈에 관한 것으로서, 인덕터나 지연 신호 라인 등을 PCB기판에 칩 부품 형태로 실장하여 2차원적으로 듀플렉싱 모듈을 형성하는 종래의 기술과는 달리, 인덕터와 지연선 등을 각기 해당 세라믹 기판에 형성하고, 이들을 FBAR필터가 형성된 구조체와 적층시키도록 함으로써, 종래와 같이 칩부품을 사용하지 않아도 되어 칩부품 비용과 그 실장 비용을 절감할 수 있고, 3차원적으로 모듈을 제조할 수 있어 그 크기를 종래의 듀플렉싱 모듈보다 최소화할 수 있다.
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公开(公告)号：KR1020040050313A
公开(公告)日：2004-06-16
申请号：KR1020020078112
申请日：2002-12-10
Applicant: 전자부품연구원
IPC: H03F3/20
Abstract: PURPOSE: A power amplifier module is provided to reduce a cost of chip components and a cost required in embedding the chip components and to minimize a size of the chip components. CONSTITUTION: According to the power amplifier module, an input matching part(100) receives a RF signal and a power amplifier part(110) amplifies the RF signal received by the input matching part and an output matching part(120) matches an impedance of the amplified RF signal and then outputs it to the external. Passive elements of the input matching part and the power amplifier part and the output matching part are stacked on a plurality of ceramic boards, and an amplification integrated circuit element of the power amplifier part is embedded on the uppermost layer of the ceramic board. And a metal pattern is formed on a part where the IC element is embedded and on a part corresponding to its bottom layer.
Abstract translation: 目的：提供功率放大器模块，以降低芯片组件的成本和嵌入芯片组件所需的成本，并最大限度地减小芯片组件的尺寸。 构成：根据功率放大器模块，输入匹配部分（100）接收RF信号，功率放大器部分（110）放大由输入匹配部分接收的RF信号，输出匹配部分（120）匹配 放大的RF信号，然后将其输出到外部。 输入匹配部分和功率放大器部分和输出匹配部分的无源元件堆叠在多个陶瓷板上，功率放大器部分的放大集成电路元件嵌入陶瓷板的最上层。 并且在嵌入IC元件的部分和与其底层对应的部分上形成金属图案。
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公开(公告)号：KR1020030092379A
公开(公告)日：2003-12-06
申请号：KR1020020030019
申请日：2002-05-29
Applicant: 전자부품연구원
IPC: H01G4/12
CPC classification number: H01G4/12
Abstract: PURPOSE: A method for manufacturing a ceramic laminated device having a built-in capacitor is provided to improve the reliability of a module by accurately implementing an electrode pattern through a lithography process. CONSTITUTION: A plurality of green sheets(31,32,33,34) is formed by punching a multiplicity of via and filling them with a conductive paste. The multiplicity of via is comprised of a first group via(11a) and a second group via(11b). A photosensitive conductive paste, which wraps the multiplicity of via, is printed on each of the green sheets(31,32,33,34). First electrodes(21) are formed on the upper surfaces of some green sheets out of the green sheets(31,32,33,34) by lithographing the photosensitive conductive paste through a mask on which a first electrode pattern is formed. The first electrodes(21) wrap the first group via(11a). Second electrodes(22) are formed on the upper surfaces of the remaining out of the green sheets(31,32,33,34) by lithographing the photosensitive conductive paste through a mask on which a second electrode pattern is formed. The second electrodes(22) wrap the second group via(11b). The green sheets(31,32,33,34) having the first and second electrodes(21,22) are alternatively laminated.
Abstract translation: 目的：提供一种具有内置电容器的陶瓷层叠装置的制造方法，通过光刻工艺精确地实现电极图案，提高了组件的可靠性。 构成：通过冲压多个通孔并用导电浆料填充多个生坯片（31,32,33,34）。 通孔的多重性由第一组通孔（11a）和第二组通孔（11b）组成。 在多个生片（31,32,33,34）上印刷着包裹多个通孔的感光性导电膏。 通过在其上形成有第一电极图案的掩模上对感光性导电膏进行平版印刷，在生片（31,32,33,34）的一些生片的上表面上形成第一电极（21）。 第一电极（21）经由（11a）包裹第一组。 通过在其上形成有第二电极图案的掩模上对感光性导电膏进行平版印刷，在生片（31,32,33,34）中剩余的上表面上形成第二电极（22）。 第二电极（22）经由（11b）包裹第二组。 具有第一和第二电极（21,22）的生片（31,32,33,34）交替层压。
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公开(公告)号：KR1020030006639A
公开(公告)日：2003-01-23
申请号：KR1020010042483
申请日：2001-07-13
Applicant: 전자부품연구원
IPC: G03F7/004
CPC classification number: G03F7/0047 , C03C3/072 , C03C8/24 , G03F7/0007 , H01B1/22 , H05K9/0096
Abstract: PURPOSE: A photosensitive paste composition and a method for forming a micro line using the composition are provided, to obtain the clean edge of micro line and to improve the characteristic of micro line having via hole by optimizing the ratio of a photoinitiator and a photosensitive monomer. CONSTITUTION: The photosensitive paste composition comprises 25-40 wt% of alumina and aluminate powder; 25-40 wt% of glass frit; 10-30 wt% of a primary monomer containing an acid pendent novolac epoxy acrylate as a main component; 5-10 wt% of a secondary monomer containing a carboxy polyester acrylate as a main component; 0.1-3 wt% of a photoinitiator; 0.1-0.5 wt% of a lubricant; and 0.1-25 wt% of a solvent. Preferably the ratio of the mixture of the primary and secondary monomers and the photoinitiator is 29:3 by weight. The method comprises the steps of screen printing the photosensitive paste composition; drying the screen printed photosensitive dielectric paste; putting a mask where the micro line is formed on the dried paste and exposing it; and removing the mask and etching the exposed paste to form the micro line.
Abstract translation: 目的：提供一种感光性糊剂组合物和使用该组合物形成微细线的方法，以获得微细线条的清洁边缘，并通过优化光引发剂和感光性单体的比例来改善具有通孔的微细线的特性 。 构成：感光膏组合物包含25-40重量％的氧化铝和铝酸盐粉末; 25-40重量％玻璃料; 10-30重量％的以酸性侧链酚醛环氧丙烯酸酯为主要成分的初级单体; 5-10重量％的以羧基聚酯丙烯酸酯为主要成分的二次单体; 0.1-3重量％的光引发剂; 0.1-0.5重量％的润滑剂; 和0.1-25重量％的溶剂。 优选地，初级和次级单体和光引发剂的混合物的重量比为29:3。 该方法包括丝网印刷感光浆料组合物的步骤; 干燥丝网印刷光敏电介质浆料; 在干糊状物上放置微线形成掩模并将其曝光; 并去除掩模并蚀刻暴露的糊料以形成微细线。
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