公开(公告)号：KR1020090014905A

公开(公告)日：2009-02-11

申请号：KR1020070079238

申请日：2007-08-07

Applicant: 삼성전자주식회사 ,  한국과학기술원

Inventor： 이성원 ,  최영곤 ,  김정호 ,  노용성 ,  박현철 ,  마중수 ,  김남식

IPC: H04L1/00

CPC classification number: H04B3/36

Abstract: An apparatus for network-coding and a method thereof are provided to increase data transmission capacity by transmitting signals combined with simple calculation. A received signal processor decodes two or more received signals. Two or more decoded received signals are input to a transmitted signal processor(120) from the received signal processor. The transmitted signal processor combines two or more decoded received signals and produces one combined transmitted signal. The transmitted signal processor comprises a combining unit and RSC(Recursive Systematic Convolutional) encoder. Two or more decoded received signals are input to the combining unit(410) from an interleaver. By performing the XOR(Exclusive OR) calculation about the decoded received signal the combining unit produces a combined application signal. The combined application signal is input to the RSC encoder(420). The RSC encoder produces the combined transmitted signal by encoding the combined application signal.

Abstract translation: 提供一种用于网络编码的装置及其方法，通过发送与简单计算结合的信号来增加数据传输容量。 接收到的信号处理器解码两个或更多个接收到的信号。 两个或多个解码的接收信号从接收到的信号处理器输入到发射信号处理器（120）。 发射信号处理器组合两个或多个解码的接收信号并产生一个组合的发射信号。 发送信号处理器包括组合单元和RSC（递归系统卷积）编码器。 两个或多个解码的接收信号从交织器输入到组合单元（410）。 通过对解码的接收信号执行XOR（异或）计算，组合单元产生组合的应用信号。 组合的应用信号被输入到RSC编码器（420）。 RSC编码器通过对组合的应用信号进行编码来产生组合的发送信号。

公开(公告)号：KR1020080102448A

公开(公告)日：2008-11-26

申请号：KR1020070048958

申请日：2007-05-21

Applicant: 한국과학기술원 ,  한국전기연구원

Inventor： 김정호 ,  윤창욱 ,  박영진 ,  김영원 ,  김관호 ,  박현정

IPC: H04L25/03 ,  H04B1/06 ,  H04L25/02

CPC classification number: H04L25/03 ,  H04B1/10 ,  H04B1/18 ,  H04B1/71637

Abstract: An ultra wideband impulse signal receiver and a triggering circuit recover the ultra wideband impulse signal to a digital signal by using the triggering circuit composed of an amplifier and an inverter. A low noise amplifier(130) is used for amplifying the ultra-wideband impulse signal received from the outside. An envelope detector(140) is used for outputting the detected analog signal by detecting the envelop of the amplified ultra-wideband impulse signal. An ultra wideband impulse signal receiver(100) includes a triggering circuit(150) converting the detected analog signal into the digital signal. An ultra wideband antenna(110) is used for receiving the ultra-wideband impulse signal from the outside.

Abstract translation: 超宽带脉冲信号接收器和触发电路通过使用由放大器和反相器组成的触发电路将超宽带脉冲信号恢复到数字信号。 低噪声放大器（130）用于放大从外部接收的超宽带脉冲信号。 包络检测器（140）用于通过检测放大的超宽带脉冲信号的包络来输出检测到的模拟信号。 超宽带脉冲信号接收器（100）包括将检测到的模拟信号转换成数字信号的触发电路（150）。 超宽带天线（110）用于从外部接收超宽带脉冲信号。

公开(公告)号：KR1020080064261A

公开(公告)日：2008-07-09

申请号：KR1020070000970

申请日：2007-01-04

Applicant: 한국과학기술원

Inventor： 김정호 ,  이지왕 ,  김진국 ,  송익환 ,  조정현

IPC: H03K19/003

CPC classification number: H03K19/018521 ,  H03K5/133 ,  H04L25/0272

Abstract: A pre-emphasis output circuit is provided to perform a pre-emphasis operation without inputting an additional clock signal and recovering a clock of data because a plurality of delayers does not have the same delay time. In a pre-emphasis output circuit, a main driver(11) receives and amplifies a data signal, and outputs the data signal at an output terminal. A shared load(14) is connected to the output terminal of the main driver. A delay line(13) includes a plurality of delayers which are connected in series and control delay time according to a control voltage respectively, receives the data signals and outputs the delay signals to delay the data signals as much as the delay time, to each delayer. A plurality of tap drivers(121,122,123,124) amplify the delay signals and includes the pre-emphasis output circuit connected to add the delay signals at an output terminal of the main driver.

Abstract translation: 提供预加重输出电路以执行预加重操作，而不输入附加时钟信号并恢复数据时钟，因为多个延迟器不具有相同的延迟时间。 在预加重输出电路中，主驱动器（11）接收并放大数据信号，并在输出端输出数据信号。 共享负载（14）连接到主驱动器的输出端子。 延迟线（13）包括分别串联连接的多个延迟器和分别根据控制电压的控制延迟时间，接收数据信号并输出​​延迟信号以将延迟时间的数据信号延迟到每个延迟时间 延迟。 多个抽头驱动器（121,122,123,124）放大延迟信号，并且包括连接的预加重输出电路，以在主驱动器的输出端添加延迟信号。

公开(公告)号：KR100842775B1

公开(公告)日：2008-07-01

申请号：KR1020070014649

申请日：2007-02-13

Applicant: 한국과학기술원

Inventor： 김정호 ,  이지왕

IPC: H04L27/01 ,  H04B7/005 ,  H04B1/38 ,  H04B1/10

CPC classification number: Y02D70/40 ,  Y02D70/44 ,  H04L27/01 ,  H03G3/3042 ,  H04B1/38

Abstract: A two-stage equalizer, a two-stage equalization method, a receiver, and a high speed communication system are provided to decrease a power consumption of the communication system by effectively compensating for a high speed data signal. A two-stage equalizer includes an emphasis circuit(4100) and a de-emphasis circuit(4200). The emphasis circuit divides an input signal into N pieces. A divided signal passes through cascaded transconductance filters, such that a high frequency component is extracted. The signal from the transconductance filters passes through cascaded flat band amplifiers, such that delay times are equalized. The signal from the flat band amplifiers is amplified by a variable gain amplifier, such that a signal gain is adjusted. N amplified signals are added in a linear mixer.

Abstract translation: 提供两级均衡器，两级均衡器，接收器和高速通信系统，以通过有效地补偿高速数据信号来降低通信系统的功耗。 两级均衡器包括加重电路（4100）和去加重电路（4200）。 加重电路将输入信号分为N个。 分频信号通过级联跨导滤波器，从而提取高频分量。 来自跨导滤波器的信号通过级联的平带放大器，使得延迟时间相等。 来自平带放大器的信号由可变增益放大器放大，从而调整信号增益。 在线性混频器中加入N个放大的信号。

公开(公告)号：KR100836536B1

公开(公告)日：2008-06-10

申请号：KR1020060131945

申请日：2006-12-21

Applicant: 한국과학기술원

Inventor： 김정호 ,  김가원 ,  유충현

IPC: H01Q1/24 ,  H01Q1/38 ,  G06K17/00 ,  G06K7/00

CPC classification number: H01Q9/27 ,  H01L2223/6677 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48237 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01Q1/2283 ,  Y10T29/49018

Abstract: An SiP(System-in-Package) having reduced effect on an antenna by a conductor and a method for designing the same are provided to minimize current or an electromagnetic field induced to the conductor by forming a slit or a slot on a conductor plane or forming the conductor plane in a line shape. An SiP includes an antenna and a first conductor(604). The antenna is integrated with the SiP and mounted on a top surface of an SiP substrate, and transmits and receives data. The first conductor has a plane shape, is connected to a bottom surface of the SiP substrate, and has a slit(606). The slit reduces current or an electromagnetic field induced to the first conductor by current or an electromagnetic field of the antenna. The slit is perpendicular to a direction of a current path of the antenna.

Abstract translation: 提供了通过导体对天线的影响减小的SiP（系统级封装）及其设计方法，以通过在导体平面上形成狭缝或狭槽来最小化对导体感生的电流或电磁场，或 以线状形成导体平面。 SiP包括天线和第一导体（604）。 天线与SiP集成并安装在SiP衬底的顶表面上，并发送和接收数据。 第一导体具有平面形状，连接到SiP基板的底表面，并且具有狭缝（606）。 狭缝通过天线的电流或电磁场来减小对第一导体感应的电流或电磁场。 狭缝垂直于天线的电流路径的方向。

公开(公告)号：KR100811607B1

公开(公告)日：2008-03-11

申请号：KR1020060128023

申请日：2006-12-14

Applicant: 한국과학기술원

Inventor： 김정호 ,  이지왕

IPC: H01L23/12

CPC classification number: H01L2224/48091 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for tuning a passive element balun circuit is provided to reduce a cost and to simplify a tuning process by using a bonding wire having an adjustable length and an adjustable diameter. An integrated circuit(221) is mounted on an integrated circuit pad(222). A balun circuit(211) is mounted on a balun circuit pad(212) which is arranged at a front end of the integrated circuit. The integrated circuit pad and the balun circuit pad are integrated within a package. A method for tuning a passive element balun circuit includes a process for obtaining parasitic inductance and obtaining a length and a diameter of a necessary bonding wire(34,35,36,37) according to parasitic inductance, and a process for connecting electrically the balun circuit pad with the integrated circuit pad by using the bonding wires having electrical and magnetic characteristics corresponding to the length and the diameter.

Abstract translation: 提供了一种用于调谐无源元件平衡 - 不平衡转换电路的方法，以通过使用具有可调长度和可调节直径的接合线来降低成本并简化调谐过程。 集成电路（221）安装在集成电路板（222）上。 平衡 - 不平衡转换电路（211）安装在平衡 - 不平衡变换器电路板（212）上，该平衡 - 不平衡转换电路布置在集成电路的前端。 集成电路焊盘和平衡 - 不平衡转换电路板集成在封装内。 一种用于调谐无源元件平衡 - 不平衡转换电路的方法包括一种用于获得寄生电感并根据寄生电感获得所需接合线（34,35,36,37）的长度和直径的工艺，以及用于连接电子平衡 - 不平衡转换 电路板通过使用具有对应于长度和直径的电和磁特性的接合线而具有集成电路板。

公开(公告)号：KR100783735B1

公开(公告)日：2007-12-07

申请号：KR1020060119282

申请日：2006-11-29

Applicant: 한국과학기술원

Inventor： 김정호 ,  심유정

IPC: H04B1/40 ,  H04B5/02

CPC classification number: H04B5/0062 ,  G06K7/10297 ,  G06K7/10386 ,  H04B5/02

Abstract: An RFID(Radio Frequency Identification) reader is provided to separate a Tx circuit or a power amplifier from a basic circuit so that noise by a signal from the Tx circuit or the power amplifier can have little effect on the basic circuit. An RFID reader(200) comprises a Tx circuit(220) and a basic circuit(210). The Tx circuit(220) creates the first signal containing power to be sent to an RFID tag. The basic circuit(210), spatially separated from the Tx circuit on an identical package, receives the second signal from the RFID tag and processes it. In addition, the RFID reader comprises a Tx/Rx-combined antenna for the transmission of the first signal and the reception of the second signal.

Abstract translation: 提供RFID（射频识别）读取器以将Tx电路或功率放大器与基本电路分离，使得来自Tx电路或功率放大器的信号的噪声对基本电路几乎没有影响。 RFID读取器（200）包括Tx电路（220）和基本电路（210）。 Tx电路（220）产生包含发送到RFID标签的功率的第一信号。 在相同封装上与Tx电路在空间上分离的基本电路（210）从RFID标签接收第二信号并对其进行处理。 此外，RFID读取器包括用于传输第一信号和接收第二信号的Tx / Rx组合天线。

公开(公告)号：KR100783732B1

公开(公告)日：2007-12-07

申请号：KR1020060058169

申请日：2006-06-27

Applicant: 한국과학기술원

Inventor： 김정호 ,  김재민

IPC: G06F17/50

CPC classification number: G01R31/2848 ,  G01R31/2853

Abstract: A method for numerically analyzing a hierarchical system is provided to perform a numeric analysis at high speed while maintaining the accuracy and require additional resources by performing the numeric analysis of each structure with present analysis programs. A first and second structure respectively modeling a first and second layer, and an inter-structure modeling electric interaction between the first and second layer are found(S52). The first and second structure, and the inter-structure are independently and numerically analyzed(S53). Numeric analysis results are integrally operated by considering an electric interface condition between the first structure and the inter-structure, and between the second structure and the inter-structure(S55). The first and second layer is a chip and a package, and the package and a board.

Abstract translation: 提供了一种用于数字分析分层系统的方法，以高速执行数值分析，同时通过使用现有的分析程序执行每个结构的数值分析，同时保持精度并且需要额外的资源。 分别建立分别建模第一层和第二层的第一和第二结构，以及第一层和第二层之间的结构间建模电相互作用（S52）。 分别对第一和第二结构以及结构进行独立和数值分析（S53）。 通过考虑第一结构和结构之间的电接口条件以及第二结构和结构之间的电接口条件（S55），数字分析结果被一体地操作。 第一层和第二层是芯片和封装，以及封装和板。

公开(公告)号：KR100771146B1

公开(公告)日：2007-10-29

申请号：KR1020060120195

申请日：2006-11-30

Applicant: 한국과학기술원

Inventor： 김정호 ,  박종배 ,  심유정

IPC: H01L23/58 ,  H01L23/60

CPC classification number: H01L2224/33 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L23/552 ,  H01L23/142 ,  H01L23/522 ,  H01L2924/00012

Abstract: A system in package is provided to suppress high-frequency switching noise and electromagnetic interference effectively by using the single layer capacitor of high self resonant frequency and high capacitor. At least one integrated circuit chip is mounted on a main chip pad(11), and a ground plane(12) is formed under the main chip pad to provide the integrated circuit chip with a ground potential. A power plane(13) is spaced apart from the ground plane to supply a power potential to the integrated circuit chip. A single layer capacitor chip(15) is composed of two metal plates and a high-k material filled between the plates, and is interposed between the ground plane and the power plane so that the two metal plates are electrically connected to the ground plane and the power plane.

Abstract translation: 提供一种封装体系，通过使用高自谐振频率和高电容的单层电容器有效抑制高频开关噪声和电磁干扰。 至少一个集成电路芯片安装在主芯片焊盘（11）上，并且在主芯片焊盘下形成接地平面（12），以为集成电路芯片提供接地电位。 电源平面（13）与接地平面间隔开，以向集成电路芯片供电。 单层电容器芯片（15）由两个金属板和填充在板之间的高k材料组成，并且被插入在接地平面和电源平面之间，使得两个金属板电连接到接地平面， 电力平面。

公开(公告)号：KR100499865B1

公开(公告)日：2005-07-07

申请号：KR1020020022660

申请日：2002-04-25

Applicant: 한국과학기술원

Inventor： 유중돈 ,  김정호 ,  이지혜

IPC: H01L23/12

CPC classification number: H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81 ,  H01L2924/15311 ,  H01L2924/00

Abstract: 본 발명은 기판에 칩이 패키징된 패키지 및 그 패키징 방법에 있어서, 낮은 온도와 국부적인 위치에서 솔더링을 수행하여 솔더부의 신뢰도와 생산성을 향상시킬 수 있는 초음파 솔더링을 이용한 전자 패키지 및 그 패키징 방법을 제공하는 데 그 목적이 있다.
본 발명에 따르면, 기판(40)과 칩(30)이 패키징된 패키지에 있어서, 칩(30)과 마주하는 기판(40)의 일면에는 홈(42)들이 형성되고, 기판(40)과 마주하는 칩(30)의 일면에는 홈(42)들에 대응하는 복수의 돌출부(32)들이 형성되어 기판(40)의 홈(42)에 각각 삽입되며, 홈(42)의 안쪽에는 돌출부(32)를 감싸는 솔더(46)가 위치하는 패키지(100)가 제공되며, 또한, 본 발명에 따르면, 초음파 솔더링을 이용한 전자 패키징 방법에 있어서, 칩(30)과 마주하는 기판(40)의 일면에 형성된 각각의 홈(42)들 안에 솔더(46)를 채우는 단계와, 기판(40)과 마주하는 칩(30)의 일면에 형성된 돌출부(32)들을 홈(42) 각각에 삽입하는 단계와, 솔더(46)에 돌출부(32)가 삽입된 상태에서 기판(40)에 열을 가하고, 칩(30)에 압력과 초음파 진동을 인가하여 돌출부(32)를 솔더(46)에 접합하는 단계를 포함하는 패� �징 방법이 제공된다.

Abstract translation: 目的：提供一种使用超声波焊接的电子封装及其封装方法，用于通过在使用压力和超声波的同时产生局部热量来有效地将芯片与基板的电路连接，并且通过形成焊接工艺来提高焊接过程中的生产率和质量 在进行焊接工艺的同时进行底部填充。 构成：在与芯片（30）相对的基板（40）的表面上形成槽（42）。 在芯片的表面上形成对应于凹槽的多个突起（32），使得突起分别插入到基板的凹槽中。 围绕突起的焊料（46）位于槽内。