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公开(公告)号：KR100138873B1
公开(公告)日：1998-06-01
申请号：KR1019940036333
申请日：1994-12-23
Applicant: 한국전자통신연구원
IPC: H01L21/334
Abstract: 본 발명은 갈륨비소 화합물 반도체의 활성층을 형성할 수 있는 기존의 고가 장비를 사용하지 않고, 유황을 화학용액에 담그는 간단한 처리방법에 의해 소자의 활성층을 제조함으로써, 소자의 제작공정 시간을 줄일 수 있고, 소자 제작 단가를 낮출 수 있다는 장점을 갖고 있다.
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公开(公告)号：KR1019970002438B1
公开(公告)日：1997-03-05
申请号：KR1019930029633
申请日：1993-12-24
Applicant: 한국전자통신연구원
IPC: H01L21/3205
Abstract: A thin film conductive layer structure for gold plating for the purpose of forming an airbridge is provided, which is constructed in such a manner that a metal pad layer 1 is formed using a first resist layer 2, a thin film conductive layer 3 is formed on the overall surface of a wafer, a second resist layer 4 is coated on a predetermined portion of the first resist layer 2, a gold-plating layer 5 is formed on a predetermined portion where the second resist layer 4 is not coated, and the resist layers 2 and 4 and thin film conductive layer 3 are removed. The thin film conductive layer 3 is configured of a three-level structure and includes an adhesion layer 6, made of Cr or Ti, for increasing the adhesive strength between the gold-plating layer 5 and first resist layer 2, a conductive layer 7, made of Ni, having a predetermined thickness of above 100 angstrom, to be used in plating, and a surface protection layer 8, made of Au with a thickness of below 50 angstrom, for preventing the native oxide layer being formed on thethin film conductive layer.
Abstract translation: 提供了一种用于形成空气桥的用于镀金的薄膜导电层结构，其以使用第一抗蚀剂层2形成金属焊盘层1的方式构造，在 晶片的整个表面，第二抗蚀剂层4涂覆在第一抗蚀剂层2的预定部分上，在未涂覆第二抗蚀剂层4的预定部分上形成镀金层5，并且抗蚀剂 层2和4以及薄膜导电层3被去除。 薄膜导电层3由三层结构构成，并且包括由Cr或Ti制成的用于增加镀金层5和第一抗蚀剂层2之间的粘合强度的粘合层6，导电层7， 由具有预定厚度的100埃以上的Ni制成，用于电镀，以及由Au制成的厚度低于50埃的表面保护层8，用于防止在该导电层上形成的天然氧化物层 。
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Patent Agency Ranking
公开(公告)号：KR1019970001888B1
公开(公告)日：1997-02-18
申请号：KR1019930026305
申请日：1993-12-03
Applicant: 한국전자통신연구원
IPC: H01L23/34
Abstract: A method for thermal emitting of electric power FET(field effect transistor) for micro wave is disclosed. The method for thermal emitting of electric power FET(field effect transistor) for micro wave comprises the steps of: a) forming a photoresist(22) and deposing the etching mask(11); b) etching a lower portion of a channel layer using the channel etching mask(11) to a predetermined thickness; c) removing the channel etching mask(11); d) depositing titanium and base metal(55) to a predetermined thickness; e) forming a photoresist(22) for filling an only channel layer on the resulting deposited structure; f) forming a filled gold except for the photoresist(22); g) removing the photoresist(22); and h) performing a plating of gold to a predetermined thickness. Thereby, the thermal emitting is effectively achieved compared with the prior art.
Abstract translation: 公开了一种用于微波的功率FET（场效应晶体管）的热发射方法。 用于微波的电功率FET（场效应晶体管）的热发射方法包括以下步骤：a）形成光致抗蚀剂（22）并去除蚀刻掩模（11）; b）使用沟道蚀刻掩模（11）将沟道层的下部蚀刻至预定厚度; c）去除沟道蚀刻掩模（11）; d）将钛和贱金属（55）沉积到预定厚度; e）形成光致抗蚀剂（22），用于填充所得沉积结构上的唯一沟道层; f）除了光致抗蚀剂（22）之外，形成填充的金; g）去除光致抗蚀剂（22）; 和h）进行镀金至预定厚度。 因此，与现有技术相比，有效地实现了热发射。
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公开(公告)号：KR1019960039223A
公开(公告)日：1996-11-21
申请号：KR1019950009258
申请日：1995-04-19
Applicant: 한국전자통신연구원
IPC: H01L21/338 , H01L29/812
Abstract: 본 발명은 금속-반도체 전계효과 트랜지스터(MESFET:metalsemiconductor field effect transistor), 고전자 이동도 트랜지스터(HEMT : high electron mobility transistor) 또는 이종접합 바이폴라 트랜지스터(HBT : heter-ojuntion bipolar transistor) 등과 같은 갈륨비소 화합물 반도체 소자의 제조방법에 관한 것으로, 특히 상기 소자의 게이트 전극 형성방법에 관한 것이다.
본 발명은 게이트 전극으로 사용되는 금속층을 형성하는 공정전에 웨이퍼의 표면을 황화암모늄[(NH
4 )
2 S
x ] 용액으로 유황처리하는 공정을 포함함을 특징으로 하며, 상기 유황처리 공정에 의해 웨이퍼의 표면상태밀도가 낮아지고, 이에 따른 쇼트키 장벽높이가 의도하는 만큼 얻어질 수 있다.-
公开(公告)号：KR1019960026482A
公开(公告)日：1996-07-22
申请号：KR1019940035464
申请日：1994-12-21
Applicant: 한국전자통신연구원
IPC: H01L21/304
Abstract: 본 발명은 오옴익층의 새로운 금속구조를 제시한다.
오옴익층의 형성과정은 종래의 방법과 동일하나 금속구조가 기판으로부터 Ni/Ge/Au/Ti/Au의 적층을 이룬다.
이를 약 400℃정도의 온도에서 20초 정도 열처리를 수행하여 오옴익층을 형성한다.
본 발명에 의한 오옴익층은 종래의 구조에 비하여 접촉저항값이 향상될 뿐아니라, 표면 조직과 열안정성 역시 향상되는장점을 가진다.-
公开(公告)号：KR1019940004274B1
公开(公告)日：1994-05-19
申请号：KR1019900021806
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L29/80
Abstract: forming a first epitaxial layer 2 on a GaAs substrate 1 using molecular beam epitaxy; forming an insulating layer 3 by sequential deposition of a first AlGaAs 3b, GaAs 3c and a second AlGaAs 3a on first epitaxial layer 2, first AlGaAs layer 3b and second AlGaAs layer 3a are formed at the same temperature, and GaAs layer 3c is formed at the temperature lower than that of AlGaAs layer 3a,3b; forming an second epitaxial layer 4 on the insulating layer 3; selective etching second AlGaAs layer 3a, GaAs layer 3c and first Al GaAs layer 3b so as to expose first epitaxial layer 2 and second epitaxial layer 4a; forming a metal pattern 6 on an active region of each device; forming a predetermined photoresist pattern 5a on the surface of the substrate; forming an isolation region 7 in the vertical derection to the substrate by ion implanting into the substrate using the photoresist pattern 5a as mask, thereby to shut off the current between the the devices without damaging to the substrate.
Abstract translation: 使用分子束外延在GaAs衬底1上形成第一外延层2; 通过在第一外延层2上顺序沉积第一AlGaAs 3b，GaAs 3c和第二AlGaAs 3a来形成绝缘层3，在相同温度下形成第一AlGaAs层3b和第二AlGaAs层3a，并且形成GaAs层3c 温度低于AlGaAs层3a，3b; 在绝缘层3上形成第二外延层4; 选择性蚀刻第二AlGaAs层3a，GaAs层3c和第一Al GaAs层3b，以暴露第一外延层2和第二外延层4a; 在每个装置的有源区上形成金属图案6; 在所述基板的表面上形成预定的光致抗蚀剂图案5a; 通过使用光致抗蚀剂图案5a作为掩模将衬底中的离子注入到衬底中，在垂直于衬底的垂直方向上形成隔离区域7，从而切断器件之间的电流而不损坏衬底。
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公开(公告)号：KR1019940004261B1
公开(公告)日：1994-05-19
申请号：KR1019900021810
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: H01L21/335
Abstract: forming a carrier channel layer 2 on a GaAs substrate 1; forming a passivation layer 3 and a GaAs semiconductor layer 4 on the overall surface of the carrier channel layer, and forming a substrate pattern with mesa shape; forming a insulating layer 5 on the GaAs layer 4; forming a gate insulating layer 5a by etching the insulating layer 5 and GaAs layer 4; forming a gate on the gate insulating layer 5a; forming a source region and drain region by selective implantation of silicon ion into the passivation layer 3; and forming a source 8 and drain 9 on the source region and drain region, thereby improving the operating speed and high frequency characteristics of the metal-insulator field effect transistor.
Abstract translation: 在GaAs衬底1上形成载流子通道层2; 在载流子通道层的整个表面上形成钝化层3和GaAs半导体层4，并形成台面形状的衬底图形; 在GaAs层4上形成绝缘层5; 通过蚀刻绝缘层5和GaAs层4形成栅极绝缘层5a; 在栅极绝缘层5a上形成栅极; 通过将硅离子选择性地注入到钝化层3中来形成源极区和漏极区; 并在源极区域和漏极区域上形成源极8和漏极9，从而提高金属 - 绝缘体场效应晶体管的工作速度和高频特性。
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