41.
    发明专利
    未知

    公开(公告)号:DE69222144T2

    公开(公告)日:1998-02-05

    申请号:DE69222144

    申请日:1992-03-12

    Abstract: A drive circuit (20) comprising a voltage source (21) supplying a reference voltage (VREF) at its output (35); a voltage elevating circuit (23) connected to the supply (VS) and to the output (35) of the voltage source, and supplying at its output (42), under normal operating conditions, a drive voltage (VCP) greater than the supply voltage and increasing with the reference voltage. The input of the voltage source (21) is connected to the output (42) of the voltage elevating circuit (23), and defines a positive feedback resulting in an increase in the reference voltage (VREF) alongside an increase in the drive voltage (VCP), and therefore a corresponding increase in the drive voltage (VCP) up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.

    44.
    发明专利
    未知

    公开(公告)号:IT1313850B1

    公开(公告)日:2002-09-24

    申请号:ITMI992469

    申请日:1999-11-25

    Abstract: A high side circuit is described which comprises at least one power device (1) having a first non drivable terminal (D) connected to a supply voltage (Vcc), at least one load (2) connected between a second non drivable terminal (S) of the power device (1) and ground, and driving circuitry (10). The driving circuitry (10) comprises suitable dimensioned transistors (M1, M2, M3) which are connected to each other and to a higher voltage (Vboot) than the supply voltage (Vcc) in order to control the turning on and the turning off of the power device (1) and to minimize the potential difference between the second non drivable terminal (S) and a drivable terminal (G) of the power device (1) during the turning off state to avoid the re-turning on of the same power device.

    45.
    发明专利
    未知

    公开(公告)号:DE69222144D1

    公开(公告)日:1997-10-16

    申请号:DE69222144

    申请日:1992-03-12

    Abstract: A drive circuit (20) comprising a voltage source (21) supplying a reference voltage (VREF) at its output (35); a voltage elevating circuit (23) connected to the supply (VS) and to the output (35) of the voltage source, and supplying at its output (42), under normal operating conditions, a drive voltage (VCP) greater than the supply voltage and increasing with the reference voltage. The input of the voltage source (21) is connected to the output (42) of the voltage elevating circuit (23), and defines a positive feedback resulting in an increase in the reference voltage (VREF) alongside an increase in the drive voltage (VCP), and therefore a corresponding increase in the drive voltage (VCP) up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.

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