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    METHOD FOR CONTROLLING VOLTAGE OF HVLDMOS CIRCUIT BOARD
    1.
    发明专利
    METHOD FOR CONTROLLING VOLTAGE OF HVLDMOS CIRCUIT BOARD 失效

    公开(公告)号：JPH1168530A

    公开(公告)日：1999-03-09

    申请号：JP17706298

    申请日：1998-06-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GENOVA ANGELO ,  TARANTOLA MARIO ,  CANTONE GIUSEPPE ,  GARIBOLDI ROBERTO

    IPC: H03K17/06

    Abstract: PROBLEM TO BE SOLVED: To provide a circuit, capable of more efficiently charging a capacitance without increasing the power consumption for a parasitic transistor. SOLUTION: A circuit that charges a capacitance C with an LDMOS-LD integrated transistor is provided with a switching means SWb controlled by a logical signal UVLO. Hereby, the switching means SWb is made into active state, in order to charge a board node with the current whose maximum value is restricted to the pre-established value during a phase, in which a supply voltage Vs of an integrated circuit is lower than the minimum switch-on voltage of the same integrated circuit.

    INTEGRATED DEVICE FOR SWITCHING SYSTEM PROVIDED WITH FILTERED REFERENCE AMOUNT
    2.
    发明专利
    INTEGRATED DEVICE FOR SWITCHING SYSTEM PROVIDED WITH FILTERED REFERENCE AMOUNT 失效

    公开(公告)号：JPH11168369A

    公开(公告)日：1999-06-22

    申请号：JP19477998

    申请日：1998-07-09

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GENOVA ANGELO ,  CANTONE GIUSEPPE ,  GARIBOLDI ROBERTO

    IPC: H03K5/08 ,  G05F3/26 ,  H03K17/16

    Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive integrated device of relatively simple and compact constitution without receiving interference at the time of switching. SOLUTION: In this integrated device 105 for a switching system provided with a control means 110 for generating switching control signals, a reference means 120 for generating a reference amount Qref and a means 110 for using the reference amount, the means 130 for storing the reference amount, a switch means 122 for connecting the reference means 120 to a using means 110 and a storage means 130 so as to supply the reference amount Qref in a first operation state and interrupting the reference means 120 from the using means 110, connecting the storage means 130 to the using means 110 and supplying the stored reference amount Qref in a second operation state and a filter means 135 for maintaining the switch means 122 in the second operation sate during a filtering period corresponding to the switching of control signals Sh are provided.

    PROTECTION CIRCUIT FOR CONTROLLING GATE VOLTAGE OF HVLDMOS TRANSISTOR
    3.
    发明专利
    PROTECTION CIRCUIT FOR CONTROLLING GATE VOLTAGE OF HVLDMOS TRANSISTOR 失效

    公开(公告)号：JPH1168531A

    公开(公告)日：1999-03-09

    申请号：JP17718598

    申请日：1998-06-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： TARANTOLA MARIO ,  CANTONE GIUSEPPE ,  GENOVA ANGELO ,  GARIBOLDI ROBERTO

    IPC: H03K17/06 ,  H03K17/0812 ,  H03K17/16

    Abstract: PROBLEM TO BE SOLVED: To surely control a gate voltage so that an LDMOS transistor can not be switched on undesiredly by providing a 2nd inverter provided with an input end, to which a 2nd logical signal is inputted and an output end which is connected to a gate node of the LDMOS transistor. SOLUTION: In a pMOS transistor M1, its source is connected to the cathode of a diode D1 and to a charging terminal of a bootstrap capacitor Cp, also its drain is connected to the drain of an nMOS transistor M2 and to the gate of an LDMOS integrated transistor LD. The source of the transistor M2 is connected to an output node A of a control inverter 101 and to the other terminal of the condenser Cp. Then gates of the transistors M1 and M2 are controlled by a logical signal UVLOb and prevent the transistor LD from being turned on accidentally.

    TURN-OFF CIRCUIT FOR LDMOS WHEN REVERSE CURRENT EXISTS
    4.
    发明专利
    TURN-OFF CIRCUIT FOR LDMOS WHEN REVERSE CURRENT EXISTS 失效

    公开(公告)号：JPH1174769A

    公开(公告)日：1999-03-16

    申请号：JP17734198

    申请日：1998-06-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： TARANTOLA MARIO ,  CANTONE GIUSEPPE ,  GENOVA ANGELO ,  GARIBOLDI ROBERTO

    IPC: H03K17/06 ,  H03K17/08

    Abstract: PROBLEM TO BE SOLVED: To automatically switch off an LDMOS transistor by having a zener diode which is biased forward between a supply node and a source node of an LDMOS transistor and providing a 2nd zener diode in place of a charging diode. SOLUTION: A 1st Zener diode Z1 is used in place of a charging diode of a capacity Cp which exists at Vs supply voltage. A 2nd Zener diode Z2 is connected between a source node S of a transistor LD and the supply node Vs. When Zehner voltages VZ1 and VZ2 of the diodes Z1 and Z2 satisfy the condition Vs>VZ1, there holds VTH>VZ1-VZ2, and when Vs Vs+ Vbe-VZ2 holds. VTH is the threshold voltage of the transistor LD, and the difference between the source voltage of the transistor LD and the substrate voltage is equal to VZ2-nVbe.

    VOLTAGE DOUBLER,VOLTAGE BOOSTER,AND VOLTAGE ADJUSTER
    5.
    发明专利
    VOLTAGE DOUBLER,VOLTAGE BOOSTER,AND VOLTAGE ADJUSTER 失效

    公开(公告)号：JPH08275506A

    公开(公告)日：1996-10-18

    申请号：JP20714595

    申请日：1995-08-14

    Applicant: CONS RIC MICROELETTRONICA ,  ST MICROELECTRONICS SRL

    Inventor： PULVIRENTI FRANCESCO ,  GARIBOLDI ROBERTO

    IPC: H02M3/07

    Abstract: PROBLEM TO BE SOLVED: To obtain two ways of use for enabling finding out the advantageous use of a charge pump MOS voltage booster and boosters of this type. SOLUTION: A voltage booster is equipped with four MOS transistors (M1, M2, M3, M4) in place of a classical diode showing an undesirable voltage drop and with an oscillator having two output terminals and two corresponding charge transfer capacitors, in place of a classical oscillator of a single output having relevant charge transfer capacitors. In this method, the undesirable voltage drop substantially does not exist, and ripples are reduced without making a circuit complicated.

    DRIVE CIRCUIT OF MOS HALF-BRIDGE
    6.
    发明专利
    DRIVE CIRCUIT OF MOS HALF-BRIDGE 失效

    公开(公告)号：JPH0698529A

    公开(公告)日：1994-04-08

    申请号：JP5248293

    申请日：1993-03-12

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GARIBOLDI ROBERTO ,  LEONE MARCELLO

    IPC: H02M1/08 ,  H03F3/26 ,  H03K17/06 ,  H03K17/687

    Abstract: PURPOSE: To obtain a driver circuit operating a MOS half bridge, even at a low supply voltage. CONSTITUTION: A driver circuit 20 has a linearity voltage regulator 21 which is connected to a power-supply line 29 and supplying reference voltage VREF, a first input terminal 36 connected with the power supply line 29, a second input terminal 46, to which a reference voltage is applied, and a charge-pump circuit 23 having an output terminal 42 for supplying a drive voltage VCP.

    7.
    发明专利
    未知

    公开(公告)号：DE69533308T2

    公开(公告)日：2004-11-25

    申请号：DE69533308

    申请日：1995-05-16

    Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

    Inventor： PULVIRENTI FRANCESCO ,  GARIBOLDI ROBERTO

    IPC: G01R19/165 ,  G01R31/02 ,  G05B19/042 ,  G05B19/05

    Abstract: The invention relates to a method for detecting an open load by means of a driver having at least one main power transistor (M10) connected to the load (L) and one auxiliary transistor (M11) connected in parallel with the main transistor (M10) between a first power supply voltage reference (Vs) and a second voltage reference (GND), the method providing a comparison between a first voltage (VIN1) present on a terminal (S10) connected to the load of the main transistor (M10) and a second voltage (VIN2) present on a terminal (S11) of the auxiliary transistor (M11). The invention also relates to a circuit for detecting an open load (L), in which the said method is implemented.

    9.
    发明专利
    未知

    公开(公告)号：ITVA20000031D0

    公开(公告)日：2000-09-07

    申请号：ITVA20000031

    申请日：2000-09-07

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GENOVA ANGELO ,  GARIBOLDI ROBERTO ,  NOVELLI ALDO ,  RICOTTI GIULIO

    IPC: G01R19/165

    Abstract: The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ground, the respective input nodes of which are connected in common to an output node of the differential stage. The third stage is formed by a transistor identical to a transistor of the first stage and delivers a current signal through a current terminal thereof, proportional to the current being delivered to the load.

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