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    VECTOR FIND ELEMENT EQUAL INSTRUCTION
    41.
    发明专利
    VECTOR FIND ELEMENT EQUAL INSTRUCTION 未知

    公开(公告)号：SG11201404824TA

    公开(公告)日：2014-09-26

    申请号：SG11201404824T

    申请日：2013-03-07

    Applicant: IBM

    Inventor： BRADBURY JONATHAN DAVID ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  GSCHWIND MICHAEL KARL

    IPC: G06F15/76 ,  G06F40/00

    Abstract: Processing of character data is facilitated. A Find Element Equal instruction is provided that compares data of multiple vectors for equality and provides an indication of equality, if equality exists. An index associated with the equal element is stored in a target vector register. Further, the same instruction, the Find Element Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.

    DYNAMIC ENABLEMENT OF MULTITHREADING
    43.
    发明专利
    DYNAMIC ENABLEMENT OF MULTITHREADING 未知

    公开(公告)号：CA2940905C

    公开(公告)日：2022-08-16

    申请号：CA2940905

    申请日：2015-03-19

    Applicant: IBM

    Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY CHARLES ,  JACOBI CHRISTIAN

    IPC: G06F9/46 ,  G06F9/50

    Abstract: Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread, and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. The computer system also includes a multithreading facility configured to control the configuration to perform a method. The method includes executing in the primary thread in the ST mode, an MT mode setting instruction. A number of threads requested is obtained from a location specified by the MT mode setting instruction. Based on determining that the number of threads requested indicates multiple threads, the MT mode is enabled to execute the multiple threads including the primary thread and the one or more secondary threads.

    VECTOR EXCEPTION CODE
    45.
    发明专利
    VECTOR EXCEPTION CODE 未知

    公开(公告)号：CA2895653C

    公开(公告)日：2020-08-04

    申请号：CA2895653

    申请日：2013-12-06

    Applicant: IBM

    Inventor： BRADBURY JONATHAN DAVID ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GSCHWIND MICHAEL KARL

    IPC: G06F17/16

    Abstract: Vector exception handling is facilitated. A vector instruction is executed that operates on one or more elements of a vector register. When an exception is encountered during execution of the instruction, a vector exception code is provided that indicates a position within the vector register that caused the exception. The vector exception code also includes a reason for the exception.

    FINDING THE LENGTH OF A SET OF CHARACTER DATA HAVING A TERMINATION CHARACTER
    46.
    发明专利
    FINDING THE LENGTH OF A SET OF CHARACTER DATA HAVING A TERMINATION CHARACTER 未知

    公开(公告)号：CA2867117C

    公开(公告)日：2020-02-18

    申请号：CA2867117

    申请日：2013-03-01

    Applicant: IBM

    Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY

    IPC: G06F7/00 ,  G06F9/30

    Abstract: The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.

    Dynamic enablement of multithreading
    48.
    发明专利
    Dynamic enablement of multithreading 未知

    公开(公告)号：AU2015238632B2

    公开(公告)日：2018-04-26

    申请号：AU2015238632

    申请日：2015-03-19

    Applicant: IBM

    Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES ,  JACOBI CHRISTIAN

    IPC: G06F9/50 ,  G06F9/38

    Abstract: Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread, and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. The computer system also includes a multithreading facility configured to control the configuration to perform a method. The method includes executing in the primary thread in the ST mode, an MT mode setting instruction. A number of threads requested is obtained from a location specified by the MT mode setting instruction. Based on determining that the number of threads requested indicates multiple threads, the MT mode is enabled to execute the multiple threads including the primary thread and the one or more secondary threads.

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