公开(公告)号：CA2800632A1

公开(公告)日：2011-12-29

申请号：CA2800632

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  GAINEY CHARLES ,  CRADDOCK DAVID ,  CONESKI ANTHONY ,  GLENDENING BETH ,  FARRELL MARK ,  GREGG THOMAS ,  NJOKU-CHARLES UGOCHUKWU

IPC: G06F13/28 ,  G06F13/38

Abstract: An adapter is enabled for use. The enabling includes assigning one or more address spaces to the adapter, based on a request. For each address space assigned to the adapter, a corresponding device table entry is assigned. When the adapter is no longer needed, it is disabled and the assigned device table entries become available.

公开(公告)号：MX383434B

公开(公告)日：2025-03-14

申请号：MX2016012532

申请日：2016-09-26

Applicant: IBM

Inventor： GAINEY CHARLES ,  JACOBI CHRISTIAN ,  BUSABA FADI YUSUF ,  GREINER DAN ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY

IPC: G06F9/30 ,  G06F9/455 ,  G06F9/48 ,  G06F9/50

Abstract: Las modalidades se refieren a subprocesamiento múltiple en una computadora. Un aspecto es una computadora que incluye una configuración que tiene un núcleo que incluye subprocesos físicos y es operable en modos de subprocesamiento individual (ST) y subprocesamiento múltiple (MT). La computadora también incluye un programa anfitrión configurado para ejecutarse en el modo ST en el núcleo para emitir una instrucción de inicio de ejecución virtual (inicio de VE) para distribuir una entidad invitada que incluye una máquina virtual (VM) invitada. La instrucción de inicio de VE se ejecuta por el núcleo e incluye obtener una descripción de estado, que tiene un estado de invitado, desde una ubicación especificada por la instrucción de inicio de VE. La ejecución incluye determinar, con base en el estado de invitado, si la entidad invitada incluye un subproceso invitado individual o múltiples subprocesos invitados, e iniciar los subprocesos invitados en el modo MT o modo ST con base en el estado de invitado y una determinación de si la entidad invitada incluye un subproceso invitado individual o múltiples subprocesos invitados.

公开(公告)号：MX376377B

公开(公告)日：2025-03-04

申请号：MX2016011921

申请日：2016-09-14

Applicant: IBM

Inventor： GAINEY CHARLES ,  GSCHWIND MICHAEL KARL

IPC: G06F15/76 ,  G06F9/4401 ,  G06F9/445 ,  G06F15/78

Abstract: Se hace la determinación de que una instalación de modo arquitectónico de configuración está instalada en un ambiente de cómputo que está configurada para una pluralidad de modos arquitectónicos y tiene una secuencia de encendido definida que es para encender el ambiente de cómputo en un modo arquitectónico de la pluralidad de modos arquitectónicos. Sobre la base de la determinación de que la instalación de modo arquitectónico de configuración está instalada, el ambiente de cómputo es reconfigurado para restringir el uso de un modo arquitectónico. La reconfiguración incluye seleccionar una secuencia de encendido diferente al encendido del ambiente de cómputo en otro modo arquitectónico de la pluralidad de modos arquitectónicos, donde el otro modo arquitectónico es diferente del modo arquitectónico, y ejecutar la secuencia de encendido diferente para encender el ambiente de cómputo en el otro modo arquitectónico en lugar del modo arquitectónico que restringe el uso del modo arquitectónico.

公开(公告)号：CA2940909C

公开(公告)日：2022-10-18

申请号：CA2940909

申请日：2015-03-09

Applicant: IBM

Inventor： GSCHWIND MICHAEL KARL ,  GAINEY CHARLES

IPC: G06F9/455 ,  G06F9/46

Abstract: A facility is provided that, when installed, removes from an architecture a selected architectural function, such that the function is not able to be turned on/off regardless of other controls within the environment. When the facility is installed, the architectural function is not supported when processing in an architectural mode based on the architecture. It is as if the selected architectural function is no longer available in the architecture, and in fact, the code implementing the facility may have been deleted, bypassed, or otherwise eliminated. One such architectural function is virtual address translation, such as dynamic address translation (DAT), and the architecture is, for instance, ESA/390.

公开(公告)号：CA2940988C

公开(公告)日：2022-08-16

申请号：CA2940988

申请日：2015-03-16

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY CHARLES

IPC: G06F9/46

Abstract: THREAD CONTEXT RESTORATION IN A MULTITHREADING COMPUTER SYSTEM Amultithreading computer system includesa configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method including disabling one or more secondary threads based on switching from MT mode to ST mode. A thread context of secondary threads is made unavailable to programs. Based on a last-set program-specified maximum thread-id indicating MT, the thread context is obtained by a) executing a set MT instruction to resume the MT mode, and b) based on being in the resumed MT mode, accessing the thread context.

公开(公告)号：SI3114561T1

公开(公告)日：2019-05-31

申请号：SI201530669

申请日：2015-03-09

Applicant: IBM

Inventor： GSCHWIND MICHAEL KARL ,  GAINEY CHARLES

IPC: G06F9/00 ,  G06F15/00

公开(公告)号：AU2015330266B2

公开(公告)日：2018-10-04

申请号：AU2015330266

申请日：2015-09-14

Applicant: IBM

Inventor： GAINEY CHARLES ,  FARRELL MARK ,  HELLER LISA ,  KUBALA JEFFREY PAUL ,  SCHMIDT DONALD WILLIAM ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  OSISEK DAMIAN ,  BRADBURY JONATHAN DAVID ,  LEHNERT FRANK ,  NERZ BERND ,  JACOBI CHRISTIAN

IPC: G06F9/455 ,  G06F9/48

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.

公开(公告)号：AU2015238706B2

公开(公告)日：2018-05-10

申请号：AU2015238706

申请日：2015-03-06

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  KUBALA JEFFREY PAUL ,  BUSABA FADI YUSUF ,  BRADBURY JONATHAN DAVID ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  SCHMIDT DONALD WILLIAM ,  GAINEY CHARLES ,  JACOBI CHRISTIAN

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/50

Abstract: Embodiments relate to multithreading in a computer. An aspect is a computer including a configuration having a core which includes physical threads and is operable in single thread (ST) and multithreading (MT) modes. The computer also includes a host program configured to execute in the ST mode on the core to issue a start-virtual-execution (start-VE) instruction to dispatch a guest entity which includes a guest virtual machine (VM). The start-VE instruction is executed by the core and includes obtaining a state description, having a guest state, from a location specified by the start-VE instruction. The execution includes determining, based on the guest state, whether the guest entity includes a single guest thread or multiple guest threads, and starting the guest threads in the MT mode or ST mode based on the guest state and a determination of whether the guest entity includes a single guest thread or multiple guest threads.

公开(公告)号：AU2015230885B2

公开(公告)日：2018-02-01

申请号：AU2015230885

申请日：2015-03-09

Applicant: IBM

Inventor： GSCHWIND MICHAEL KARL ,  GAINEY CHARLES

IPC: G06F9/44 ,  G06F9/30

Abstract: A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in another architectural mode of the plurality of architectural modes, wherein the another architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the another architectural mode in place of the one architectural mode restricting use of the one architectural mode.

公开(公告)号：CA2961690A1

公开(公告)日：2016-04-14

申请号：CA2961690

申请日：2015-09-14

Applicant: IBM

Inventor： FARRELL MARK ,  HELLER LISA ,  KUBALA JEFFREY PAUL ,  SCHMIDT DONALD WILLIAM ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  OSISEK DAMIAN ,  BRADBURY JONATHAN DAVID ,  LEHNERT FRANK ,  NERZ BERND ,  JACOBI CHRISTIAN ,  GAINEY CHARLES

IPC: G06F9/48

Abstract: A system and method of implementing a modified priority routing of an input/output (I/O) interruption. The system and method determines whether the I/O interruption is pending for a core and whether any of a plurality of guest threads of the core is enabled for guest thread processing of the interruption in accordance with the determining that the I/O interruption is pending. Further, the system and method determines whether at least one of the plurality of guest threads enabled for guest thread processing is in a wait state and, in accordance with the determining that the at least one of the plurality of guest threads enabled for guest thread processing is in the wait state, routes the I/O interruption to a guest thread enabled for guest thread processing and in the wait state.