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    41.
    发明专利
    未知

    公开(公告)号：DE69426935T2

    公开(公告)日：2001-08-02

    申请号：DE69426935

    申请日：1994-12-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  MANDRINI TIZIANA

    IPC: B60R16/02 ,  B60R16/03 ,  G05F1/10 ,  H02H3/20 ,  H02H7/06 ,  H02H7/20

    Abstract: A semiconductor electronic circuit with a protection device against supply voltage overloading, being of the type which comprises a first power circuit portion (2) connected to a power supply line (AL) and enabled through at least a first transistor (Q1). This transistor (Q1) has a control terminal driven by a voltage sensor (R1, R2, Z1) connected to the power supply line (AL). The semiconductor electronic circuit (1) is characterized, moreover, in that it comprises a second signal circuit portion (3) connected to the power supply line (AL) in a structurally independent manner of the first power circuit portion (2) and through a controlled switch (M1).

    45.
    发明专利
    未知

    公开(公告)号：DE69406108T2

    公开(公告)日：1998-02-12

    申请号：DE69406108

    申请日：1994-04-15

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  CHIOZZI GIORGIO

    IPC: H03F1/30 ,  H03F3/181 ,  H03F3/72 ,  H03G3/34

    Abstract: A low frequency amplifier (30) comprising, in series, a first input stage (2), an intermediate amplifying stage (3) and a final stage (4). The intermediate amplifying stage comprises a capacitor (18) which is discharged when the amplifier is disabled, and is charged to a predetermined bias value when the amplifier is operative. To prevent voltage peaks at the output of the amplifier (30) during the transient interval between the disabled and operating condition of the amplifier, a second input stage (31) is provided which is only turned on during the transient interval, and is connected to the capacitor (18) to detect its voltage and charge it. During the transient interval, the final stage (4) is disabled. Upon the capacitor (18) reaching the predetermined charge value, the second input stage practically turns itself off, and is then disabled; and, at the same time, the first input stage (2) and the final stage (4) are enabled to turn on the amplifier (30).

    48.
    发明专利
    未知

    公开(公告)号：ITUB20155835A1

    公开(公告)日：2017-05-24

    申请号：ITUB20155835

    申请日：2015-11-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  RAIMONDI MARCO

    IPC: G01R27/02 ,  H04R5/04

    Abstract: A diagnostic circuit (40) for detecting the load status of an audio amplifier (20) is described. The audio amplifier (20) comprising two output terminals for connection to at least one speaker (30). In particular, the diagnostic circuit (40) comprises a first (402), a second (404) and (406) third circuit. The first circuit (402) is configured to generate a first signal (TV) indicating whether a signal (AAS) provided via the two output terminals comprises an audio signal. The second circuit (404) is configured to detect a first measurement signal being indicative for the output current ( I out ) provided via the two output terminals, and compare the first measurement signal with at least one threshold in order to generate a second signal (LS) indicating whether the output current ( I out ) has a low current amplitude profile or a high current amplitude profile. The third circuit (406) is configured to generate a diagnostic signal (DIAG) as a function of the first (TV) and the second (LS) signal. For example, the diagnostic signal (DIAG) may indicate an open load condition when the first signal (TV) indicates that the signal (AAS) provided via the two output terminals comprises an audio signal and the second signal (LS) indicates a low current amplitude profile.

    49.
    发明专利
    未知

    公开(公告)号：DE60035108T2

    公开(公告)日：2008-02-07

    申请号：DE60035108

    申请日：2000-08-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BOTTI EDOARDO ,  GROSSO ANTONIO

    IPC: H03F3/217 ,  H03F1/30 ,  H03F3/45

    Abstract: A power amplification apparatus receiving in input an enable signal (En) and an input square wave signal (C) is described. The apparatus comprises a device (6) receiving the input square wave signal (C) and the enable signal (En) and which produces a new enable signal (Ens) of the apparatus which is synchronized with a rise or down front of the input square wave signal (C), so that an output square wave signal (Vo) of the apparatus, which is normally shifted of a certain period fraction with respect to the square wave signal (C) in input to the apparatus, has the first (Ti) and the last (Tf) pulses which have a duration equal to a period fraction of the output square wave signal (Vo).

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