公开(公告)号：ITRM20000032A1

公开(公告)日：2001-07-20

申请号：ITRM20000032

申请日：2000-01-20

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  GUINEA JESUS ,  CASTELLO RINALDO

IPC: G05F3/24 ,  G05F3/26

Abstract: The generator includes complementary MOS transistors interconnected in four circuit branches one of which contains a constant-current generator. Voltages picked up at various nodes of the circuit can be used as reference and/or biasing voltages of the integrated circuit, which account for the variability of the manufacturing parameters.

公开(公告)号：DE69521197D1

公开(公告)日：2001-07-12

申请号：DE69521197

申请日：1995-04-11

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO ,  BIETTI IVAN ,  CLERICI GIANCARLO

IPC: H04B1/58 ,  H04M1/58 ,  H04M1/76 ,  H04M1/00

Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.

公开(公告)号：DE69226021D1

公开(公告)日：1998-07-30

申请号：DE69226021

申请日：1992-09-23

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO ,  CONFALONIERI PIERANGELO

IPC: H03K17/06 ,  H03K17/687

Abstract: A driver circuit for an electronic switch (2) which is to be operated from a clock signal (F) having a predetermined frequency, comprises an input pin (A) being applied the clock signal, and a voltage doubler (1) connected between said pin (A) and the switch (2).

公开(公告)号：IT1252533B

公开(公告)日：1995-06-19

申请号：ITMI913376

申请日：1991-12-17

Applicant: ST MICROELECTRONICS SRL

Inventor： TOMASINI LUCIANO ,  CASTELLO RINALDO

IPC: H04M20060101 ,  H04M1/00 ,  H04M1/60 ,  H04M1/76 ,  H04M19/08 ,  H04M

Abstract: A circuit is described which comprises an operational amplifier A, two resistors R1, R2, connected between the telephone line L and the inputs of the amplifier, a capacitor C, which is charged by a first bipolar transistor P1 controlled by the amplifier via a first FET transistor M1, a second bipolar transistor P2 arranged in parallel with the connection of the first transistor P1 and the capacitor C, a second FET transistor M2, equal to the first and with "source" and "gate" terminals connected to the corresponding terminals of the first one, and two current generators CC1, CC2, connected to the "drain" terminals, respectively, of the first and the second FET transistor and to the bases, respectively, of the first and the second bipolar transistor P1, P2. The currents I1, I2 of the two generators and the other parameters of the circuit are such as to keep the first and the second bipolar transistor respectively conducting and inhibited, except in the case when the line voltage drops below a minimum predetermined value: in such case, the first and the second transistor respectively switch to inhibition and conduction. The circuit has a lower "voltage loss" than the known circuits.