中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

167 records (took 0.06 seconds)

    Method of etching silicon wafer and silicon wafer
    43.
    发明授权
    Method of etching silicon wafer and silicon wafer 失效
    蚀刻硅晶片和硅晶片的方法

    公开(公告)号：US06284670B1

    公开(公告)日：2001-09-04

    申请号：US09120803

    申请日：1998-07-23

    Applicant: Yoshitsugu Abe ,  Hiroshi Tanaka ,  Atsushi Sakaida ,  Toshihisa Taniguchi ,  Tsuyoshi Fukada

    Inventor： Yoshitsugu Abe ,  Hiroshi Tanaka ,  Atsushi Sakaida ,  Toshihisa Taniguchi ,  Tsuyoshi Fukada

    IPC: H01L213063

    CPC classification number: B81C1/00158 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0114 ,  B81C2201/0133 ,  H01L21/3063

    Abstract: After an Si wafer is anisotropically etched through an etching mask having an opening in an anisotropically etching solution, an etching face of the Si wafer emerged by the anisotropic etching is subjected to anodic oxidation by applying a positive voltage for anodic oxidation on the Si wafer. As a result, the etching face of the Si wafer is isotropically etched due to the anodic oxidation in the anisotropic etching solution. By the isotropic etching thus performed, a sharp corner formed at an end portion of a recess portion formed in the Si wafer by the anisotropic etching, is rounded. Because the isotropic etching reaction progresses very slowly in comparison with the anisotropic etching, control of the etching can be made easy and accurately. As a result, the thickness of the diaphragm can be prevented from being dispersed.

    Abstract translation: 在通过各向异性蚀刻溶液中具有开口的蚀刻掩模对Si晶片进行各向异性蚀刻之后，通过在Si晶片上施加阳极氧化的正电压，通过各向异性蚀刻出现的Si晶片的蚀刻面进行阳极氧化。 结果，由于各向异性蚀刻溶液中的阳极氧化，Si晶片的蚀刻面被各向同性地蚀刻。 通过如此进行的各向同性蚀刻，通过各向异性蚀刻形成在形成在Si晶片中的凹部的端部处形成的尖角变圆。 由于与各向异性蚀刻相比，各向同性蚀刻反应进行得非常缓慢，因此可以容易且精确地控制蚀刻。 结果，可以防止隔膜的厚度分散。

    Method for manufacturing minute silicon mechanical device
    44.
    发明授权
    Method for manufacturing minute silicon mechanical device 失效
    微晶硅机械装置的制造方法

    公开(公告)号：US5981308A

    公开(公告)日：1999-11-09

    申请号：US887927

    申请日：1997-07-03

    Applicant: Seok-Soo Lee

    Inventor： Seok-Soo Lee

    IPC: C25F3/12 ,  B81B3/00 ,  H01L21/306 ,  H01L21/3063 ,  H01L49/00 ,  H01L21/00 ,  H01L21/76

    CPC classification number: B81C1/0015 ,  B81B2203/0136 ,  B81C2201/0114 ,  B81C2201/0136

    Abstract: A method for manufacturing a minute silicon mechanical device, which includes the steps of forming a diffusion region by doping a predetermined portion of a silicon substrate with an impurity of high density; forming an epitaxial layer over the silicon substrate including the diffusion region and forming an oxide layer over the epitaxial layer; forming an ohmic contact layer at the lower surface of the silicon substrate; patterning the oxide layer to have a striped configuration at that portion of the oxide layer corresponding to the predetermined portion of the diffusion region, thus exposing a predetermined portion of the epitaxial layer; forming a plurality of beams having a striped configuration by etching the exposed portion of the epitaxial layer, using the oxide layer as a mask and then removing the oxide layer; and removing the diffusion region below the plurality of beams.

    Abstract translation: 一种微硅机械装置的制造方法，其特征在于，包括以下步骤：通过用高密度的杂​​质掺杂硅衬底的预定部分来形成扩散区; 在包括所述扩散区的所述硅衬底上形成外延层，并在所述外延层上形成氧化物层; 在硅衬底的下表面处形成欧姆接触层; 在氧化物层的与扩散区域的预定部分相对应的部分处，使氧化物层图形化，从而暴露出外延层的预定部分; 通过使用所述氧化物层作为掩模蚀刻所述外延层的暴露部分，然后除去所述氧化物层，形成具有条纹构造的多个光束; 以及去除多个光束下方的扩散区域。

    A METHOD OF MANUFACTURING A SELF-ORDERED POROUS STRUCTURE OF ALUMINIUM OXIDE, A NANOPOROUS ARTICLE AND A NANO OBJECT
    45.
    发明申请
    A METHOD OF MANUFACTURING A SELF-ORDERED POROUS STRUCTURE OF ALUMINIUM OXIDE, A NANOPOROUS ARTICLE AND A NANO OBJECT 审中-公开
    一种制造自氧化铝多孔结构的方法，一种纳米材料和一种纳米对象

    公开(公告)号：WO2008014977A2

    公开(公告)日：2008-02-07

    申请号：PCT/EP2007006768

    申请日：2007-07-31

    Applicant: MAX PLANCK GESELLSCHAFT ,  LEE WOO ,  NIELSCH KORNELIUS ,  GOESELE ULRICH ,  JI RAN

    Inventor： LEE WOO ,  NIELSCH KORNELIUS ,  GOESELE ULRICH ,  JI RAN

    IPC: C25D11/10 ,  C25D11/12 ,  C25D11/16

    CPC classification number: C25D11/10 ,  B01D67/006 ,  B01D67/0065 ,  B01D67/0088 ,  B01D67/009 ,  B01D71/025 ,  B01D2323/28 ,  B01D2323/283 ,  B01D2325/02 ,  B81C1/00126 ,  B81C2201/0114 ,  B82Y30/00 ,  C25D1/08 ,  C25D11/024 ,  C25D11/12 ,  C25D11/16 ,  C25D11/18

    Abstract: A new oxalic acid based anodization process for long-range ordered alumina membranes has been developed, which can readily be implemented in nanotechnology as well as in industry. The process is a new generation of the so-called "hard anodization (HA)" that has widely been employed in industry for high-speed fabrication of mechanically robust, very thick (> 100 µm) and low-porosity anodic alumina films since the 1960s. It offers big advantages over conventional anodization processes for nanoporous alumina membranes in terms of processing time, enabling 2500-3500% faster oxide growth with improved ordering of the nanopores. Perfectly ordered anodic alumina membranes on a cm 2 -scale with a high aspect ratio (> 1000) of uniform nanopores with periodically modulated diameters have been realized by this new anodization process.

    Abstract translation: 已经开发了一种用于长距离有序氧化铝膜的新型草酸阳极氧化工艺，可以在纳米技术和工业中实现。 该工艺是新一代所谓的“硬质阳极氧化（HA）”，已经广泛应用于工业中高速制造机械坚固，非常厚（>100μm）和低孔隙度阳极氧化铝膜，因为 20世纪60年代。 在处理时间方面，它比传统的多孔氧化铝膜的阳极氧化工艺具有很大的优势，能够使纳米孔的排列改善使氧化物生长快速增加2500-3500％。 通过这种新的阳极氧化工艺已经实现了具有高纵横比（> 1000）的具有周期性调制直径的均匀纳米孔的cm 2标准的完全有序的阳极氧化铝膜。

    A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE OF SiC
    47.
    发明申请
    A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE OF SiC 审中-公开
    一种生产SiC半导体器件的方法

    公开(公告)号：WO01056069A1

    公开(公告)日：2001-08-02

    申请号：PCT/SE2001/000160

    申请日：2001-01-26

    IPC: B81B3/00 ,  H01L21/04 ,  H01L21/3063 ,  B81C1/00 ,  H01L41/22

    CPC classification number: B81C1/00539 ,  B81C2201/0114 ,  B81C2201/0139 ,  H01L21/0475

    Abstract: The invention relates to a method for selective etching of SiC, the etching being carried out by applying a positive potential to a layer (3; 8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC. The invention also relates to a method for producing a SiC micro structure having free hanging parts (i.e. diaphragm, cantilever or beam) on a SiC-substrate, a method for producing a MEMS device of SiC having a free hanging structure, and a method for producing a piezo-resistive pressure sensor comprising the step of applying a positive potential to a layer (8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC.

    Abstract translation: 本发明涉及一种选择性蚀刻SiC的方法，该蚀刻是通过向与含有氟离子的蚀刻溶液接触并具有氧化效应的p型SiC层（3; 8）施加正电位而进行的 在SiC上。 本发明还涉及一种用于制造在SiC衬底上具有自由悬挂部分（即膜片，悬臂或光束）的SiC微结构的方法，用于制造具有自由悬挂结构的SiC的MEMS器件的方法，以及用于 制造压阻式压力传感器，包括向与所述氟离子的蚀刻溶液接触并对SiC具有氧化作用的p型SiC层（8）施加正电位的步骤。

    THREE-DIMENSIONAL SUSPENDED INTEGRATED MICROSTRUCTURE AND METHOD FOR MAKING SAME
    48.
    发明申请
    THREE-DIMENSIONAL SUSPENDED INTEGRATED MICROSTRUCTURE AND METHOD FOR MAKING SAME 审中-公开
    三维悬挂集成微结构及其制作方法

    公开(公告)号：WO01019723A1

    公开(公告)日：2001-03-22

    申请号：PCT/EP2000/008655

    申请日：2000-09-05

    IPC: B81B3/00 ,  B81C1/00 ,  G02B7/00 ,  G02B26/00 ,  G02B26/08 ,  H01L21/306 ,  H01L31/0216

    CPC classification number: B81C1/00484 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/0114 ,  G02B26/001 ,  G02B26/002 ,  G02B26/007 ,  G02B26/0833

    Abstract: The invention concerns a method for making a suspended microstructure comprising the following steps: forming a masking layer on a substrate top surface; structuring the masking layer to form at least an opening substantially defining the surface of said microstructure and for exposing part of the substrate corresponding to said surface; causing by electrochemical process said exposed semiconductor material to become porous over a predetermined thickness; electropolishing the semiconductor material underlying said microstructure made porous to form a cavity enclosing at least partially said microstructure beneath the masking layer level; and releasing said microstructure made porous to form a microstructure suspended to said substrate by at least a connection portion of its perimeter to provide said microstructure with mobility outside the substrate plane.

    Abstract translation: 本发明涉及一种制备悬浮微结构的方法，包括以下步骤：在衬底顶表面上形成掩模层; 构造掩模层以形成基本上限定所述微结构的表面的至少一个开口，并用于暴露对应于所述表面的部分基板; 通过电化学处理引起所述暴露的半导体材料在预定厚度上变得多孔; 电抛光所述微结构下面的半导体材料是多孔的，以形成在掩模层级下方至少部分地包围所述微结构的空腔; 并且释放所述微结构多孔以形成通过其周边的至少一个连接部分悬挂于所述衬底的微结构，以使所述微结构在衬底平面外部具有迁移率。

Patent Agency Ranking