公开(公告)号：KR1020030092380A

公开(公告)日：2003-12-06

申请号：KR1020020030020

申请日：2002-05-29

Applicant: 전자부품연구원

Inventor： 박성대 ,  이영신 ,  박종철

IPC: H01F41/02

Abstract: PURPOSE: A method for manufacturing a built-in ceramic inductor is provided to reduce the size of a ceramic laminated device and a high-frequency module by forming an inductor having a small-scale line width. CONSTITUTION: A via(111) is punched on a green sheet(100). The via(111) is filled with a conductive paste. A photosensitive conductive paste is printed on the upper surface of the green sheet(100) through screen printing to wrap the via(111). The photosensitive conductive paste is planarized at room temperature in order to obtain a uniform thickness. After the planarization, a lithographic process is performed using a mask on which an inductor pattern is formed. In order to remove moisture after the lithographic process, a drying process is performed. Then, an inductor pattern(121) extending from a first pad(122a) to a second pad(122b) is formed on the upper surface of the green sheet(100).

Abstract translation: 目的：提供一种制造内置陶瓷电感器的方法，通过形成具有小规模线宽的电感器来减小陶瓷层叠装置和高频模块的尺寸。 构成：在生片（100）上冲压通孔（111）。 通孔（111）填充有导电膏。 通过丝网印刷在生片（100）的上表面上印刷感光性导电糊以包裹通路（111）。 感光性导电糊在室温下平坦化，得到均匀的厚度。 在平坦化之后，使用其上形成有电感器图案的掩模来执行光刻处理。 为了在平版印刷工艺之后除去水分，进行干燥处理。 然后，在生片（100）的上表面上形成从第一焊盘（122a）延伸到第二焊盘（122b）的电感器图案（121）。

公开(公告)号：KR100388279B1

公开(公告)日：2003-06-19

申请号：KR1020010004048

申请日：2001-01-29

Applicant: 전자부품연구원

Inventor： 이우성 ,  유찬세 ,  박종철 ,  강남기 ,  이영신 ,  곽승범

IPC: H05K1/18

Abstract: PURPOSE: An RF(Radio Frequency) element built-in substrate of MCM(Multi-Chip Module)-C is provided to reduce the number of fabrication processes of the MCM-C by fabricating the MCM-C with active elements and manual elements such as an FET, a transistor, and a diode. CONSTITUTION: A resistance(11) and a capacitor(15) are formed on a ceramic substrate including manual elements. A conductive line(30) is arranged in an inside of the ceramic substrate. Active elements such as a transistor(21) are formed on an upper portion of the ceramic substrate including manual elements. A capacitor and pad pattern(15a) is used as a pad of the active elements and a capacitor(15) mounted in the ceramic substrate. The capacitor and pad pattern(15a) is exposed on an upper surface of the capacitor(15). The transistor(21) is located on the capacitor and pad pattern(15a).

Abstract translation: 目的：提供MCM（多芯片模块）-C的RF（射频）元件内置基板以通过制造具有有源元件和手动元件的MCM-C来减少MCM-C的制造工艺的数量 作为FET，晶体管和二极管。 构成：电阻（11）和电容器（15）形成在包括手动元件的陶瓷基板上。 导线（30）布置在陶瓷基板的内部。 诸如晶体管（21）的有源元件形成在包括手动元件的陶瓷基板的上部上。 电容器和焊盘图案（15a）用作有源元件的焊盘和安装在陶瓷基板中的电容器（15）。 电容器和焊盘图案（15a）暴露在电容器（15）的上表面上。 晶体管（21）位于电容器和焊盘图案（15a）上。

公开(公告)号：KR1020030004474A

公开(公告)日：2003-01-15

申请号：KR1020010039967

申请日：2001-07-05

Applicant: 전자부품연구원

Inventor： 박종철 ,  조현민 ,  이우성 ,  박성대

IPC: G01R27/28

Abstract: PURPOSE: A device for calibrating stack elements, a method for manufacturing the same and a method for measuring a high frequency characteristics by using the same are provided to eliminate the effect of a via hole and accurately measure a high frequency characteristic by making the structure which is similar to an object to be measured. CONSTITUTION: A device(300) for calibrating stack elements includes an impedance pattern layer located at the same height of an incorporated device to be measured and printed thereon an impedance pattern(310) to performing the calibration of the incorporated device, a via hole layer stacked on the impedance pattern layer and having the same height of a via hole(320) of the incorporated device and a plurality of conductive pads(330) stacked on the via hole layer and connected to the impedance pattern(310) through the via hole(320), wherein the device(300) is calibrated to the impedance pattern(310) corresponding to the position of the incorporated device by contacting a measurement device to perform the calibration at the conductive pads(330).

Abstract translation: 目的：提供一种用于校准堆叠元件的装置，其制造方法以及通过使用它们来测量高频特性的方法，以消除通孔的影响并精确地测量高频特性， 类似于要测量的对象。 构成：用于校准堆叠元件的装置（300）包括阻抗图案层，该阻抗图案层位于被测量的并入装置的相同高度并在其上印刷有阻抗图案（310），以执行所结合的装置的校准，通孔层 堆叠在阻抗图案层上并且具有与所结合的器件的通孔（320）相同的高度和堆叠在通孔层上并通过通孔连接到阻抗图案（310）的多个导电焊盘（330） （320），其中通过接触测量装置在所述导电焊盘（330）处执行所述校准，所述装置（300）被校准为对应于所结合的装置的位置的所述阻抗图案（310）。

公开(公告)号：KR100328882B1

公开(公告)日：2002-08-28

申请号：KR1019980046548

申请日：1998-10-31

Applicant: 전자부품연구원

Inventor： 양형국 ,  조현민 ,  박종철

IPC: H03H9/64

Abstract: 표면 탄성파 듀플렉서 패키지에서, 송신 필터칩 및 수신 필터칩이 장착되어 있는 기판상에 위상 정합용 스트립 라인이 형성되어 있다. 위상 정합용 스트립 라인은 송신 필터칩과 수신 필터칩에 연결되어 수신 필터칩의 위상을 정합시켜 송신주파수 대역의 임피던스를 증가 시킨다. 이와 같이 위상 정합용 스트립 라인이 필터칩과 동일한 기판상에 형성됨에 따라, 구조가 간단해지고 제조 단가가 감소된다.

公开(公告)号：KR1020020065261A

公开(公告)日：2002-08-13

申请号：KR1020010005690

申请日：2001-02-06

Applicant: 전자부품연구원

Inventor： 박종철 ,  강남기 ,  조현민 ,  임욱 ,  이재영

IPC: H05K3/40

CPC classification number: H05K3/4629 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/429

Abstract: PURPOSE: A ceramic layered part and a manufacturing method thereof are provided to simplify manufacture process and improve reliability of side terminals of the ceramic layered part. CONSTITUTION: A ceramic layered part comprises ceramic tapes(20), circuit patterns(23) and many plugs(22,26). The ceramic tapes(20) include via holes for connecting the circuit patterns(23) and via holes for side terminals. The plugs(22,26) are formed by filling the via holes with conductive paste. The viscosity of the conductive paste is more than 100,000 cps. The circuit patterns(23) are printed on the ceramic tapes(20). The circuit patterns(23) are overlapped with the plugs(26) for ensuring their connectivity. The ceramic tapes(20) having the plugs(22,26) and the circuit patterns(23) are layered so as to accurate align the plugs(22,26) and the circuit patterns(23) between the ceramic tapes(20). The layered ceramic tapes(20) are cut as dividing the plug(26) into two parts.

Abstract translation: 目的：提供一种陶瓷分层部件及其制造方法，以简化制造工艺，提高陶瓷层叠部件的侧端子的可靠性。 构成：陶瓷分层部分包括陶瓷带（20），电路图案（23）和许多插头（22,26）。 陶瓷带（20）包括用于连接电路图案（23）的通孔和用于侧端子的通孔。 通过用导电浆填充通孔来形成插头（22,26）。 导电糊的粘度大于100,000cps。 电路图案（23）印刷在陶瓷带（20）上。 电路图案（23）与插头（26）重叠以确保它们的连接。 具有插头（22,26）和电路图案（23）的陶瓷带（20）被层叠以便精确地对准陶瓷带（20）之间的插头（22,26）和电路图案（23）。 切割分层陶瓷带（20），将塞子（26）分成两部分。

公开(公告)号：KR1020020063404A

公开(公告)日：2002-08-03

申请号：KR1020010004048

申请日：2001-01-29

Applicant: 전자부품연구원

Inventor： 이우성 ,  유찬세 ,  박종철 ,  강남기 ,  이영신 ,  곽승범

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H05K1/0237

Abstract: PURPOSE: An RF(Radio Frequency) element built-in substrate of MCM(Multi-Chip Module)-C is provided to reduce the number of fabrication processes of the MCM-C by fabricating the MCM-C with active elements and manual elements such as an FET, a transistor, and a diode. CONSTITUTION: A resistance(11) and a capacitor(15) are formed on a ceramic substrate including manual elements. A conductive line(30) is arranged in an inside of the ceramic substrate. Active elements such as a transistor(21) are formed on an upper portion of the ceramic substrate including manual elements. A capacitor and pad pattern(15a) is used as a pad of the active elements and a capacitor(15) mounted in the ceramic substrate. The capacitor and pad pattern(15a) is exposed on an upper surface of the capacitor(15). The transistor(21) is located on the capacitor and pad pattern(15a).

Abstract translation: 目的：提供MCM（多芯片模块）-C的内置RF（射频）元件，以通过用有源元件和手动元件制造MCM-C来减少MCM-C的制造工艺数量 作为FET，晶体管和二极管。 构成：在包括手动元件的陶瓷基板上形成电阻（11）和电容器（15）。 导电线（30）布置在陶瓷衬底的内部。 诸如晶体管（21）的有源元件形成在包括手动元件的陶瓷基板的上部。 电容器和焊盘图案（15a）用作有源元件的焊盘和安装在陶瓷衬底中的电容器（15）。 电容器和焊盘图案（15a）暴露在电容器（15）的上表面上。 晶体管（21）位于电容器和焊盘图案（15a）上。

公开(公告)号：KR100289780B1

公开(公告)日：2001-05-15

申请号：KR1019980037941

申请日：1998-09-15

Applicant: 전자부품연구원

Inventor： 조현민 ,  양형국 ,  박종철 ,  김진용

IPC: H03H9/64

Abstract: 본 발명의 표면 탄성파 필터는 전기적인 신호를 기계적인 표면 탄성파로 변환시키며 표면 탄성파를 전기적인 신호로 변환시키는 압전 단결정 기판과, 압전 단결정 기판의 일 부분에 형성되어 압전 단결정 기판에 전기적인 신호를 전달하는 입력 변환기와, 압전 단결정 기판의 다른 부분에 형성되어 압전 단결정 기판에서 변환된 전기적인 신호를 외부로 전달하는 출력 변환기와, 압전 단결정 기판 위와 입력 및 출력 변환기의 일부를 노출하도록 입력 및 출력 변환기 위에 형성되어 표면 탄성파의 속도를 높이는 다이아몬드성 탄소박막 또는 다이아몬드 박막으로 이루어진다.
이와 같은 표면 탄성파 필터는 단결정 기판의 표면탄성파 속도를 향상시킬 수 있으므로 높은 주파수 대역에서 사용할 수 있으며, 패키지에 실장시키지 않고 바로 인쇄회로 기판상에 실장할 수 있어 이동 통신용 단말기의 소형화에 기여할 수 있다.

公开(公告)号：KR1020010036982A

公开(公告)日：2001-05-07

申请号：KR1019990044238

申请日：1999-10-13

Applicant: 전자부품연구원

Inventor： 박종철 ,  강남기 ,  이우성 ,  임욱 ,  조현민 ,  곽승범 ,  류대원 ,  유찬세

IPC: H01G4/30

CPC classification number: H01G4/30 ,  H01G4/005

Abstract: PURPOSE: A high frequency condenser for ceramic laminated module is provided to improve the capacitance characteristics and the high frequency characteristics by minimizing the condenser area and by reducing the signal transmission distance by the via contact. CONSTITUTION: The high frequency condenser for ceramic laminated module has the via contacts(18) on the center of the electrode patterns(10a,10b,10c,10d) and omits the pad of the electrode patterns. The multiple electrode patterns are connected alternatively. The electrode pattern has the square shaped plane structure where the capacitance is charged on that area and two holes on the center position of each electrode pattern. One hole of each electrode pattern is alternatively connected to the holes of adjacent electrode patterns, and the other hole of each electrode pattern is connected to the insulator pattern. The insulator patterns(14a,14b,14c,14d) are laminated between electrode patterns. The via holes(16a,16b,16c,16d) are formed on each insulator pattern and on each electrode pattern. All via holes are filled by conductive material to form the via contact.

Abstract translation: 目的：提供陶瓷层叠模块的高频电容器，通过最小化电容器面积和通过通孔接点减小信号传输距离，提高电容特性和高频特性。 构成：用于陶瓷层叠模块的高频电容器在电极图案（10a，10b，10c，10d）的中心具有通孔触点（18），并省略电极图案的焊盘。 多个电极图案交替连接。 电极图案具有方形平面结构，其中电容在该区域上充电，并且在每个电极图案的中心位置具有两个孔。 每个电极图案的一个孔替代地连接到相邻电极图案的孔，并且每个电极图案的另一个孔连接到绝缘体图案。 绝缘体图案（14a，14b，14c，14d）层叠在电极图案之间。 通孔（16a，16b，16c，16d）形成在每个绝缘体图案上和每个电极图案上。 所有通孔由导电材料填充以形成通孔接触。

公开(公告)号：KR1020010026505A

公开(公告)日：2001-04-06

申请号：KR1019990037857

申请日：1999-09-07

Applicant: 전자부품연구원

Inventor： 박종철 ,  강남기 ,  이우성 ,  임욱 ,  조현민 ,  곽승범 ,  유찬세

IPC: H01G4/33

CPC classification number: H01G4/30 ,  H01G4/005

Abstract: PURPOSE: A high-frequency condenser for a ceramic layer module is provided to improve characteristics of a capacity and a high-frequency by maximizing an effective area of an electrode pattern and shortening a signal transmitting distance. CONSTITUTION: A high-frequency condenser for a ceramic layer module includes a plurality of electrode patterns(10a,10b,10c,10d) and insulation layers(12a,12b,12c). Each electrode pattern has an effective area(A) in which an electrostatic capacity is stored. Each electrode pattern has a concave recess at its side. The electrode patterns are layered such that the concave recesses are located alternately, i.e. zigzag. Insulation patterns(14a,14b,14c,14d) are provided in the respective concave recesses. The electrode patterns and insulation layers are layered alternately by one and one. Each electrode pattern is formed with a pair of via holes(16a,16b,16c,16d) at its both sides including the insulation pattern. The via holes are filled with a conductive material to form via contacts(18a,18b).

Abstract translation: 目的：提供一种用于陶瓷层模块的高频电容器，通过最大化电极图案的有效面积和缩短信号传输距离来提高容量和高频特性。 构成：用于陶瓷层模块的高频电容器包括多个电极图案（10a，10b，10c，10d）和绝缘层（12a，12b，12c）。 每个电极图案具有存储静电电容的有效面积（A）。 每个电极图案在其侧面具有凹形凹部。 电极图案被层叠成使得凹凹槽交替地位于Z字形。 绝缘图案（14a，14b，14c，14d）设置在相应的凹形凹部中。 电极图案和绝缘层交替地层叠一层。 每个电极图案在其包括绝缘图案的两侧形成有一对通孔（16a，16b，16c，16d）。 通孔填充有导电材料以形成通孔触点（18a，18b）。

公开(公告)号：KR1020000059784A

公开(公告)日：2000-10-05

申请号：KR1019990007634

申请日：1999-03-09

Applicant: 전자부품연구원

Inventor： 윤종남 ,  박종철

IPC: H03B5/08

Abstract: PURPOSE: A voltage controlled oscillator with multi-band frequency matching circuits is provided to generate one form of radio frequency from bands of more than two frequencies. CONSTITUTION: A voltage controlled oscillator with multi-band frequency matching circuits includes the following components. A resonance circuit(30), a variable frequency band unit(40), a buffer amplifier(70), and a multi-band frequency matching unit(100). A resonance circuit(30) is equipped with a Line Concentrator(LC) parallel circuit of capacity(C1) and inductor(L1) and a serial circuit of capacity(C2) and varactor diode(VA). A varactor diode(VA) functions as a variable capacity as it forms LC parallel resonance circuit by the authenticated voltage of the voltage source(Vt). The LC parallel resonance circuit(30) generates signals according to the size of the voltage from the voltage source(Vt).

Abstract translation: 目的：提供具有多频带频率匹配电路的压控振荡器，以从两个以上频率的频带产生一种形式的射频。 构成：具有多频段频率匹配电路的压控振荡器包括以下组件。 谐振电路（30），可变频带单元（40），缓冲放大器（70）和多频带频率匹配单元（100）。 谐振电路（30）配备有容量（C1）和电感器（L1）的线路集中器（LC）并联电路和容量（C2）和变容二极管（VA）的串联电路。 变容二极管（VA）通过电压源（Vt）的认证电压形成LC并联谐振电路，起到可变容量的作用。 LC并联谐振电路（30）根据来自电压源（Vt）的电压的大小生成信号。