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Patent Agency Ranking
公开(公告)号：KR1020000059649A
公开(公告)日：2000-10-05
申请号：KR1019990007417
申请日：1999-03-06
Applicant: 전자부품연구원
IPC: H01F17/00
Abstract: PURPOSE: A laminated transformer for high frequency is provided to ensure high impedance variation rate even in using inductor with a low capacity by using a capacitor. CONSTITUTION: A transformer is comprised of a first inductor(L1), a first capacitor(C1), a second inductor(L2) and a second capacitor(C). The first inductor(L1) has a ceramic sheet(300) which is provided with a ground terminal pattern(301) and a coil pattern(302). The first capacitor(C) has two ceramic sheets(330,340) which are provided with capacitor patterns(331,341), respectively. The second inductor(L2) has a ceramic sheet(350) which is provided with a first input terminal pattern(351) and a coil pattern(352). The second capacitor(C2) has two ceramic sheets(380,390) which are provided with capacitor patterns(381,391). Each sheet has via-holes filled with paste so that the coil patterns and capacity patterns are electrically connected via the conductive paste.
Abstract translation: 目的：提供高频用层压变压器，即使在使用电容器的情况下使用低容量的电感器也能确保高阻抗变化率。 构成：变压器包括第一电感器（L1），第一电容器（C1），第二电感器（L2）和第二电容器（C）。 第一电感器（L1）具有设置有接地端子图案（301）和线圈图案（302）的陶瓷片（300）。 第一电容器（C）具有分别具有电容器图案（331,341）的两个陶瓷片（330,340）。 第二电感器（L2）具有设置有第一输入端子图案（351）和线圈图案（352）的陶瓷片（350）。 第二电容器（C2）具有设置有电容器图案（381,391）的两个陶瓷片（380,390）。 每个片材具有填充有膏体的通孔，使得线圈图案和容量图案经由导电膏电连接。
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公开(公告)号：KR100318498B1
公开(公告)日：2001-12-22
申请号：KR1019990037856
申请日：1999-09-07
Applicant: 전자부품연구원
IPC: B41F17/00
Abstract: 본발명은칩 부품의측면에단자를형성하기위한측면인쇄지그를개시한다. 본발명은칩 부품의측면크기보다상대적으로큰 크기의칩 홀이다수배열되며, 가장자리에다수의결합홈이형성된제 1 플레이트와; 칩홀이다수배열되며, 가장자리에수평방향으로수평장공이형성된제 2 플레이트와; 칩홀이다수배열되며, 가장자리에수직방향으로수직장공이형성된제 3 플레이트와; 상기결합홈, 수평장공및 수직장공을일체로결합하는결합수단을포함한다. 따라서, 칩홀의크기를조절할수 있도록하여다양한크기의칩에사용할수 있으며, 인쇄작업시칩 부품의손상을방지할수 있으며, 스퀴지또는롤러의상하방향유동이발생되는것을방지하여인쇄특성을향상시킬수 있다.
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公开(公告)号：KR100288964B1
公开(公告)日：2001-04-16
申请号：KR1019990007417
申请日：1999-03-06
Applicant: 전자부품연구원
IPC: H01F17/00
Abstract: 이발명의고주파용적층형트랜스포머에서, 다수의제1 세라믹시트에는도전성페이스트가충진된비어홀이각각형성되어있고, 이비어홀을통하여연결되어제1 인덕터를형성하는제1 코일패턴이각각형성되어있다. 그리고, 제2 세라믹시트에는제1 세라믹시트의제1 코일패턴과연결되는제1 캐패시터패턴이형성되어있고, 제3 세라믹시트에는제2 캐패시터패턴이형성되어있으며, 제2 및제3 세라믹시트는서로일정간격을두고형성되어제1 캐패시터를형성한다. 다수의제4 세라믹시트에는비어홀이각각형성되어있고, 이비어홀을통하여제2 인덕터를형성하는제2 코일패턴이각각형성되어있으며, 상기제2 코일패턴은상기제3 세라믹시트의제2 캐패시터패턴과연결된다. 그리고, 제5 세라믹시트에는제2 코일패턴과연결되는제3 캐패시터패턴이형성되어있고, 제6 세라믹시트에는제4 캐패시터패턴이형성되어있으며, 제5 및제6 세라믹시트는서로일정간격을두고형성되어제2 캐패시터를형성한다. 이러한적층형트랜스포머는캐패시터를사용함에따라, 저용량의인덕터를사용하여도높은임피던스변환율을얻을수 있으며, 소형으로제조가가능하고, 제조공정이간단하다.
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公开(公告)号：KR1020010036982A
公开(公告)日：2001-05-07
申请号：KR1019990044238
申请日：1999-10-13
Applicant: 전자부품연구원
IPC: H01G4/30
Abstract: PURPOSE: A high frequency condenser for ceramic laminated module is provided to improve the capacitance characteristics and the high frequency characteristics by minimizing the condenser area and by reducing the signal transmission distance by the via contact. CONSTITUTION: The high frequency condenser for ceramic laminated module has the via contacts(18) on the center of the electrode patterns(10a,10b,10c,10d) and omits the pad of the electrode patterns. The multiple electrode patterns are connected alternatively. The electrode pattern has the square shaped plane structure where the capacitance is charged on that area and two holes on the center position of each electrode pattern. One hole of each electrode pattern is alternatively connected to the holes of adjacent electrode patterns, and the other hole of each electrode pattern is connected to the insulator pattern. The insulator patterns(14a,14b,14c,14d) are laminated between electrode patterns. The via holes(16a,16b,16c,16d) are formed on each insulator pattern and on each electrode pattern. All via holes are filled by conductive material to form the via contact.
Abstract translation: 目的：提供陶瓷层叠模块的高频电容器，通过最小化电容器面积和通过通孔接点减小信号传输距离，提高电容特性和高频特性。 构成：用于陶瓷层叠模块的高频电容器在电极图案（10a，10b，10c，10d）的中心具有通孔触点（18），并省略电极图案的焊盘。 多个电极图案交替连接。 电极图案具有方形平面结构，其中电容在该区域上充电，并且在每个电极图案的中心位置具有两个孔。 每个电极图案的一个孔替代地连接到相邻电极图案的孔，并且每个电极图案的另一个孔连接到绝缘体图案。 绝缘体图案（14a，14b，14c，14d）层叠在电极图案之间。 通孔（16a，16b，16c，16d）形成在每个绝缘体图案上和每个电极图案上。 所有通孔由导电材料填充以形成通孔接触。
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公开(公告)号：KR1020010026504A
公开(公告)日：2001-04-06
申请号：KR1019990037856
申请日：1999-09-07
Applicant: 전자부품연구원
IPC: B41F17/00
Abstract: PURPOSE: A side printing jig for chip is provided to allow the chip insertion work to be easily performed and minimize damage to the chip component, while improving printing characteristics by preventing movement of a squeezer or a roller during printing operation. CONSTITUTION: A jig comprises a first plate(10) having a plurality of chip holes(12) with a size larger than the side surface of a chip and a plurality of coupling holes(14) formed at corners of the first plate; a second plate(20) having a plurality of chip holes(22) with a size larger than the side surface of the chip and which are formed in a position corresponding to the chip holes of the first plate, and a horizontal slot(24) formed at corners of the second plate so as to correspond to the coupling holes of the first plate; a third plate(30) having a plurality of chip holes(32) with a size larger than the side surface of the chip and which are formed in a position corresponding to the chip holes of the first plate, and a vertical slot(34) formed at corners of the third plate so as to correspond to the coupling holes of the first plate; and a coupling member(40) for coupling the coupling hole, horizontal slot and the vertical slot.
Abstract translation: 目的：提供一种用于芯片的侧面打印夹具，以便容易地执行芯片插入工作，并且最小化对芯片部件的损坏，同时通过在打印操作期间防止挤压机或滚筒的移动来改善打印特性。 构成：夹具包括具有大于芯片侧表面的尺寸的多个切屑孔（12）的第一板（10）和形成在第一板的角部处的多个联接孔（14）; 第二板（20）具有多个尺寸大于芯片的侧表面的切屑孔（22），并且形成在与第一板的切屑孔对应的位置，以及水平槽（24） 形成在第二板的角部，以对应于第一板的连接孔; 具有多个切屑孔（32）的第三板（30），其尺寸大于所述芯片的侧表面，并且形成在与所述第一板的所述切屑孔相对应的位置;以及垂直槽（34） 形成在第三板的角部，以对应于第一板的连接孔; 以及用于联接所述联接孔，水平槽和所述垂直槽的联接构件（40）。
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