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公开(公告)号：KR1020020066134A
公开(公告)日：2002-08-14
申请号：KR1020010006400
申请日：2001-02-09
Applicant: 전자부품연구원
IPC: H01G4/30
Abstract: PURPOSE: A layered ceramic capacitor is provided to minimize interference between elements. CONSTITUTION: A layered ceramic capacitor comprises many first and many second sheets(10,20) subsequently layered. Electrodes(11,21) are printed with Ag on the top sides of the first and the second sheets(10,20). A port(14) having a via hole(13) at its left is coupled to the first sheet(10). A port(23) having a via hole(24) at its right is coupled to the second sheet(20). The via holes(13,23) are filled with conductive paste. Only the first sheets(10) are electrically coupled to each other by the conductive paste. Only the second sheets(20) are electrically coupled to each other by the conductive paste. The layered ceramic capacitor is formed by capacitors, each formed by one of the first sheets(10) and one of the second sheets(20).
Abstract translation: 目的：提供层状陶瓷电容器，以最大限度地减少元件之间的干扰。 构成：层状陶瓷电容器包括随后分层的许多第一和许多第二片（10,20）。 电极（11,21）在第一和第二片（10,20）的顶侧上印有Ag。 在其左侧具有通孔（13）的端口（14）联接到第一片（10）。 在其右侧具有通孔（24）的端口（23）联接到第二片（20）。 通孔（13,23）填充有导电浆料。 只有第一片（10）通过导电膏彼此电耦合。 只有第二片（20）通过导电膏彼此电耦合。 层状陶瓷电容器由电容器形成，每个电容器由第一片材（10）中的一个和第二片材（20）之一形成。
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公开(公告)号：KR100370515B1
公开(公告)日：2003-02-06
申请号：KR1020010006401
申请日：2001-02-09
Applicant: 전자부품연구원
IPC: H01G4/30
Abstract: PURPOSE: A layered ceramic capacitor is provided to obtain excellent RF characteristic. CONSTITUTION: A layered ceramic capacitor comprises many rectangular first and second ceramic sheets(10), subsequently layered. A first via hole(16) is formed at a first corner of the first ceramic sheet(10). A second via hole(17) is formed at a second corner opposite to the first corner of the first ceramic sheet(10). A first electrode pattern(11) of Ag contacts the first via hole(16) and does not contact the second via hole(17). The first via hole(16) is formed within the first electrode pattern(11). A first via hole(26) is formed at a first corner of the second ceramic sheet. A second via hole(27) is formed at a second corner opposite to the first corner of the second ceramic sheet. A second electrode pattern(21) of Ag contacts the second via hole(27) and does not contact the first via hole(26). The second via hole(27) is formed within the second electrode pattern(21).
Abstract translation: 目的：提供分层陶瓷电容器以获得优异的RF特性。 组成：分层陶瓷电容器包括许多矩形的第一和第二陶瓷片（10），随后分层。 第一通孔（16）形成在第一陶瓷片（10）的第一角处。 第二通孔（17）形成在与第一陶瓷片（10）的第一角部相对的第二角部处。 Ag的第一电极图案（11）接触第一通孔（16）并且不接触第二通孔（17）。 第一通孔（16）形成在第一电极图案（11）内。 第一通孔（26）形成在第二陶瓷片的第一角部处。 第二通孔（27）形成在与第二陶瓷片的第一角部相对的第二角部处。 Ag的第二电极图案（21）接触第二通孔（27）并且不接触第一通孔（26）。 第二通孔（27）形成在第二电极图案（21）内。
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Patent Agency Ranking
公开(公告)号：KR1020020066135A
公开(公告)日：2002-08-14
申请号：KR1020010006401
申请日：2001-02-09
Applicant: 전자부품연구원
IPC: H01G4/30
Abstract: PURPOSE: A layered ceramic capacitor is provided to obtain excellent RF characteristic. CONSTITUTION: A layered ceramic capacitor comprises many rectangular first and second ceramic sheets(10), subsequently layered. A first via hole(16) is formed at a first corner of the first ceramic sheet(10). A second via hole(17) is formed at a second corner opposite to the first corner of the first ceramic sheet(10). A first electrode pattern(11) of Ag contacts the first via hole(16) and does not contact the second via hole(17). The first via hole(16) is formed within the first electrode pattern(11). A first via hole(26) is formed at a first corner of the second ceramic sheet. A second via hole(27) is formed at a second corner opposite to the first corner of the second ceramic sheet. A second electrode pattern(21) of Ag contacts the second via hole(27) and does not contact the first via hole(26). The second via hole(27) is formed within the second electrode pattern(21).
Abstract translation: 目的：提供层状陶瓷电容器，以获得优异的射频特性。 构成：层状陶瓷电容器包括许多矩形的第一和第二陶瓷片（10），随后分层。 第一通孔（16）形成在第一陶瓷片（10）的第一角处。 第二通孔（17）形成在与第一陶瓷片（10）的第一角相对的第二角处。 Ag的第一电极图案（11）接触第一通孔（16）并且不接触第二通孔（17）。 第一通孔（16）形成在第一电极图案（11）内。 第一通孔（26）形成在第二陶瓷片的第一角。 第二通孔（27）形成在与第二陶瓷片的第一角相对的第二角处。 Ag的第二电极图案（21）接触第二通孔（27）并且不接触第一通孔（26）。 第二通孔（27）形成在第二电极图案（21）内。
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公开(公告)号：KR100388279B1
公开(公告)日：2003-06-19
申请号：KR1020010004048
申请日：2001-01-29
Applicant: 전자부품연구원
IPC: H05K1/18
Abstract: PURPOSE: An RF(Radio Frequency) element built-in substrate of MCM(Multi-Chip Module)-C is provided to reduce the number of fabrication processes of the MCM-C by fabricating the MCM-C with active elements and manual elements such as an FET, a transistor, and a diode. CONSTITUTION: A resistance(11) and a capacitor(15) are formed on a ceramic substrate including manual elements. A conductive line(30) is arranged in an inside of the ceramic substrate. Active elements such as a transistor(21) are formed on an upper portion of the ceramic substrate including manual elements. A capacitor and pad pattern(15a) is used as a pad of the active elements and a capacitor(15) mounted in the ceramic substrate. The capacitor and pad pattern(15a) is exposed on an upper surface of the capacitor(15). The transistor(21) is located on the capacitor and pad pattern(15a).
Abstract translation: 目的：提供MCM（多芯片模块）-C的RF（射频）元件内置基板以通过制造具有有源元件和手动元件的MCM-C来减少MCM-C的制造工艺的数量 作为FET，晶体管和二极管。 构成：电阻（11）和电容器（15）形成在包括手动元件的陶瓷基板上。 导线（30）布置在陶瓷基板的内部。 诸如晶体管（21）的有源元件形成在包括手动元件的陶瓷基板的上部上。 电容器和焊盘图案（15a）用作有源元件的焊盘和安装在陶瓷基板中的电容器（15）。 电容器和焊盘图案（15a）暴露在电容器（15）的上表面上。 晶体管（21）位于电容器和焊盘图案（15a）上。
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公开(公告)号：KR1020020063404A
公开(公告)日：2002-08-03
申请号：KR1020010004048
申请日：2001-01-29
Applicant: 전자부품연구원
IPC: H05K1/18
CPC classification number: H05K1/185 , H05K1/0237
Abstract: PURPOSE: An RF(Radio Frequency) element built-in substrate of MCM(Multi-Chip Module)-C is provided to reduce the number of fabrication processes of the MCM-C by fabricating the MCM-C with active elements and manual elements such as an FET, a transistor, and a diode. CONSTITUTION: A resistance(11) and a capacitor(15) are formed on a ceramic substrate including manual elements. A conductive line(30) is arranged in an inside of the ceramic substrate. Active elements such as a transistor(21) are formed on an upper portion of the ceramic substrate including manual elements. A capacitor and pad pattern(15a) is used as a pad of the active elements and a capacitor(15) mounted in the ceramic substrate. The capacitor and pad pattern(15a) is exposed on an upper surface of the capacitor(15). The transistor(21) is located on the capacitor and pad pattern(15a).
Abstract translation: 目的：提供MCM（多芯片模块）-C的内置RF（射频）元件，以通过用有源元件和手动元件制造MCM-C来减少MCM-C的制造工艺数量 作为FET，晶体管和二极管。 构成：在包括手动元件的陶瓷基板上形成电阻（11）和电容器（15）。 导电线（30）布置在陶瓷衬底的内部。 诸如晶体管（21）的有源元件形成在包括手动元件的陶瓷基板的上部。 电容器和焊盘图案（15a）用作有源元件的焊盘和安装在陶瓷衬底中的电容器（15）。 电容器和焊盘图案（15a）暴露在电容器（15）的上表面上。 晶体管（21）位于电容器和焊盘图案（15a）上。
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公开(公告)号：KR1020010036982A
公开(公告)日：2001-05-07
申请号：KR1019990044238
申请日：1999-10-13
Applicant: 전자부품연구원
IPC: H01G4/30
Abstract: PURPOSE: A high frequency condenser for ceramic laminated module is provided to improve the capacitance characteristics and the high frequency characteristics by minimizing the condenser area and by reducing the signal transmission distance by the via contact. CONSTITUTION: The high frequency condenser for ceramic laminated module has the via contacts(18) on the center of the electrode patterns(10a,10b,10c,10d) and omits the pad of the electrode patterns. The multiple electrode patterns are connected alternatively. The electrode pattern has the square shaped plane structure where the capacitance is charged on that area and two holes on the center position of each electrode pattern. One hole of each electrode pattern is alternatively connected to the holes of adjacent electrode patterns, and the other hole of each electrode pattern is connected to the insulator pattern. The insulator patterns(14a,14b,14c,14d) are laminated between electrode patterns. The via holes(16a,16b,16c,16d) are formed on each insulator pattern and on each electrode pattern. All via holes are filled by conductive material to form the via contact.
Abstract translation: 目的：提供陶瓷层叠模块的高频电容器，通过最小化电容器面积和通过通孔接点减小信号传输距离，提高电容特性和高频特性。 构成：用于陶瓷层叠模块的高频电容器在电极图案（10a，10b，10c，10d）的中心具有通孔触点（18），并省略电极图案的焊盘。 多个电极图案交替连接。 电极图案具有方形平面结构，其中电容在该区域上充电，并且在每个电极图案的中心位置具有两个孔。 每个电极图案的一个孔替代地连接到相邻电极图案的孔，并且每个电极图案的另一个孔连接到绝缘体图案。 绝缘体图案（14a，14b，14c，14d）层叠在电极图案之间。 通孔（16a，16b，16c，16d）形成在每个绝缘体图案上和每个电极图案上。 所有通孔由导电材料填充以形成通孔接触。
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公开(公告)号：KR1020010026505A
公开(公告)日：2001-04-06
申请号：KR1019990037857
申请日：1999-09-07
Applicant: 전자부품연구원
IPC: H01G4/33
Abstract: PURPOSE: A high-frequency condenser for a ceramic layer module is provided to improve characteristics of a capacity and a high-frequency by maximizing an effective area of an electrode pattern and shortening a signal transmitting distance. CONSTITUTION: A high-frequency condenser for a ceramic layer module includes a plurality of electrode patterns(10a,10b,10c,10d) and insulation layers(12a,12b,12c). Each electrode pattern has an effective area(A) in which an electrostatic capacity is stored. Each electrode pattern has a concave recess at its side. The electrode patterns are layered such that the concave recesses are located alternately, i.e. zigzag. Insulation patterns(14a,14b,14c,14d) are provided in the respective concave recesses. The electrode patterns and insulation layers are layered alternately by one and one. Each electrode pattern is formed with a pair of via holes(16a,16b,16c,16d) at its both sides including the insulation pattern. The via holes are filled with a conductive material to form via contacts(18a,18b).
Abstract translation: 目的：提供一种用于陶瓷层模块的高频电容器，通过最大化电极图案的有效面积和缩短信号传输距离来提高容量和高频特性。 构成：用于陶瓷层模块的高频电容器包括多个电极图案（10a，10b，10c，10d）和绝缘层（12a，12b，12c）。 每个电极图案具有存储静电电容的有效面积（A）。 每个电极图案在其侧面具有凹形凹部。 电极图案被层叠成使得凹凹槽交替地位于Z字形。 绝缘图案（14a，14b，14c，14d）设置在相应的凹形凹部中。 电极图案和绝缘层交替地层叠一层。 每个电极图案在其包括绝缘图案的两侧形成有一对通孔（16a，16b，16c，16d）。 通孔填充有导电材料以形成通孔触点（18a，18b）。
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