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公开(公告)号：DE112011104443T5
公开(公告)日：2013-09-12
申请号：DE112011104443
申请日：2011-12-19
Applicant: IBM
Inventor： VERPLANKEN FABRICE JEAN , VERRILLI COLIN , VAIDHYANATHAN NATARAJAN , PHILIPPE DAMON , CHANG CHIH-JEN , CALVIGNAC JEAN , BASSO CLAUDE
IPC: G06F9/38 , G06F15/163 , H04L29/06
Abstract: Das Optimieren der Anzahl von Lanes eines Netzwerkprozessors, wenn ein Anforderungs-/Antwort-Datenverkehr zwischen dem Parser von Netzwerkprozessor-Ethernet-Anschlüsse und einem externen Coprozessor umgesetzt wird, weist bei Empfang eines 64-Byte-Ethernet-Pakets im Ethernet-Anschluss und während der Parsing-Periode auf, dass der Parser eine Anforderung mit einem Wort von 16 Byte an den Coprozessor auf der weiteren (bidirektionalen) 3,125-Lane sendet und als Reaktion darauf ein Wort mit 16 Byte auf der weiteren (bidirektionalen) 3,125-Lane empfängt. Der Coprozessorzugriff-Datenverkehr mit einem Wort von 16 Byte und ein (bidirektionaler) Datenverkehr mit einer Einheit im Netzwerkprozessor können statisch gemultiplext werden, wobei ein oder der andere Datenverkehr eingerichtet wird, wenn der Netzwerkprozessor initialisiert wird. Es wird ein dynamisches Multiplexing des Coprozessorzugriff-Datenverkehrs mit einem Wort von 16 Byte in einem Ethernet-Anschluss und des Coprozessorzugriff-Datenverkehrs mit einem Wort von 16 Byte in einem anderen Ethernet-Anschluss durchgeführt, wobei das dynamische Multiplexing mit einem Umlaufalgorithmus arbitriert wird.
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公开(公告)号：DE60132437D1
公开(公告)日：2008-03-06
申请号：DE60132437
申请日：2001-03-26
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , HEDDES MARCO , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars with different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.
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公开(公告)号：AT323999T
公开(公告)日：2006-05-15
申请号：AT02712096
申请日：2002-02-20
Applicant: IBM
Inventor： CALVIGNAC JEAN LOUIS , HEDDES MARCO , LOGAN JOSEPH FRANKLIN , VERPLANKEN FABRICE JEAN
Abstract: A method and system for reducing memory accesses by inserting qualifiers in control blocks. In one embodiment, a system comprises a processor configured to process frames of data. The processor may comprise a plurality of buffers configured to store frames of data where each frame of data may be associated with a frame control block. Each frame control block associated with a frame of data may be associated with one or more buffer control blocks. Each control block, e.g., frame control block, buffer control block, may comprise one or more qualifier fields that comprise information unrelated to the current control block. Instead, qualifiers may comprise information related to an another control block. The last frame control block in a queue as well as the last buffer control block associated with a frame control block may comprise fields with no information thereby reducing memory accesses to access information in those fields.
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54.发明专利
公开(公告)号：HK1052263A1
公开(公告)日：2003-09-05
申请号：HK03104440
申请日：2003-06-20
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , HEDDES MARCO , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars with different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.
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Patent Agency Ranking
公开(公告)号：HU0203823A2
公开(公告)日：2003-05-28
申请号：HU0203823
申请日：2000-12-21
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , HEDDES MARCO , JENKINS STEVEN KENNETH , LEAVENS ROSS BOYD , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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公开(公告)号：AU2002225237A1
公开(公告)日：2002-11-05
申请号：AU2002225237
申请日：2002-01-28
Applicant: IBM
Inventor： VERPLANKEN FABRICE JEAN , HEDDES MARCO , BASSO CLAUDE , LOGAN JOSEPH FRANKLIN , CALVIGNAC JEAN LOUIS
Abstract: Data structures, a method, and an associated transmission system for multicast transmission on network processors in order both to minimize multicast transmission memory requirements and to account for port performance discrepancies. Frame data for multicast transmission on a network processor is read into buffers to which are associated various control structures and a reference frame. The reference frame and the associated control structures permit multicast targets to be serviced without creating multiple copies of the frame. Furthermore this same reference frame and control structures allow buffers allocated for each multicast target to be returned to the free buffer queue without waiting until all multicast transmissions are complete.
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公开(公告)号：BR0015717A
公开(公告)日：2002-07-23
申请号：BR0015717
申请日：2000-12-21
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , HEDDES MARCO , JENKINSS STEVEN KENNETH , LEAVENS ROSS BODY , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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公开(公告)号：CA2403193A1
公开(公告)日：2001-10-25
申请号：CA2403193
申请日：2001-03-26
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , VERPLANKEN FABRICE JEAN , SIEGEL MICHAEL STEVEN , HEDDES MARCO , CALVIGNAC JEAN LOUIS
Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars wit h different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.
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公开(公告)号：CA2316122A1
公开(公告)日：2001-07-04
申请号：CA2316122
申请日：2000-08-17
Applicant: IBM
Inventor： CALVIGNAC JEAN LOUIS , VERPLANKEN FABRICE JEAN , HEDDES MARCO C , JENKINS STEVEN KENNETH , TROMBLEY MICHAEL RAYMOND , SIEGEL MICHAEL STEVEN , BASS BRIAN MITCHELL
IPC: G06F12/06 , G06F12/00 , G06F12/02 , G06F13/00 , G06F13/16 , G06F15/167 , G11C11/407 , H04L12/56 , G11C7/10
Abstract: The ability of network processors to move data to and from dynamic random access memory (DRAM) chips used in computer systems is enhanced in several respects. In on e aspect of the invention, two double data rate DRAMS are used in parallel to double the bandwidth for increased throughput of data. The movement of data is further improved by setting 4 banks of full 'read' and 4 banks of full 'write' by the network processor for every repetition of the DRAM time clock. A scheme for randomized 'read' and 'write' access by the network processor is disclosed. This scheme is particularly applicable to networks such as Ethernet that utilize variabl e frame sizes.
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