公开(公告)号：US20180132351A1

公开(公告)日：2018-05-10

申请号：US15863605

申请日：2018-01-05

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H05K1/09 ,  H05K1/14 ,  H05K1/02

CPC classification number: H05K1/09 ,  H05K1/0298 ,  H05K1/144 ,  H05K3/4614 ,  H05K2201/0367 ,  H05K2201/042 ,  H05K2201/09472

Abstract: A multi-layer circuit board includes a first circuit board, conducting blocks, a second circuit board, and conducting recesses. The first circuit board has a first conductor layer mounted on the first circuit board. The conducting blocks are mounted on the first circuit board and electrically connected to the first conductor layer. The second circuit board has a second conductor layer mounted thereon and facing the first circuit board. The conducting recesses are formed in the second circuit board, electrically connected to the second conductor layer, and corresponding to the respective conducting blocks. The insulating layer is mounted between the first conductor layer and the second conductor layer. The second circuit board is on the first circuit board, the conducting blocks are respectively mounted in the conducting recesses to electrically connect the first conductor layer and the second conductor layer.

公开(公告)号：US09901016B1

公开(公告)日：2018-02-20

申请号：US15488133

申请日：2017-04-14

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yung-Lin Chia

IPC: H05K9/00

CPC classification number: H05K9/0037 ,  H05K9/003

Abstract: An EMI shielding device is provided. A first shielding layer is formed on a first surface of a first substrate, and a first through hole is formed through the first substrate. A second substrate is mounted in an opening of the first through hole, and a second shielding layer is formed on a surface of the second substrate. A conductive paste is mounted between the first substrate and the at least one second substrate to electrically connected the first shielding layer and the second shielding layer. A protective layer, an antirust layer, and a shielding layer are sequentially mounted on the conductive paste. The EMI shielding device is mounted on a printed circuit board (PCB) by Surface Mount Technology. Therefore, the EMI shielding device may be firmly mounted on the PCB, and there is not any narrow gap that may leak electromagnetic radiation.

公开(公告)号：US20170318671A1

公开(公告)日：2017-11-02

申请号：US15143354

申请日：2016-04-29

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H05K1/09 ,  H05K1/02

CPC classification number: H05K1/09 ,  H05K1/0298 ,  H05K1/144 ,  H05K3/4614 ,  H05K2201/0367 ,  H05K2201/042 ,  H05K2201/09472

Abstract: A multi-layer circuit board includes a first circuit board, multiple conducting blocks, a second circuit board, and multiple conducting recesses. The first circuit board has a first conductor layer formed thereon. The conducting blocks are mounted on the first circuit board and electrically connected to the first conductor layer. The second circuit board has a second conductor layer mounted thereon and facing the first circuit board. The conducting recesses are formed in the surface of the second circuit board. Each conducting recess has a conducting layer electrically connected to the second conductor layer. When the conducting blocks are mounted in the conducting recesses, the first conductor layer and the second conductor layer are electrically connected through the conducting blocks and the conducting recesses. As can be separated from the first circuit board for test of the two conductor layers, the yield of the second circuit board is enhanced.

公开(公告)号：US20170287617A1

公开(公告)日：2017-10-05

申请号：US15086333

申请日：2016-03-31

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H01F27/28 ,  H01F27/06 ,  H05K3/46 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01F27/2804 ,  H01F2027/2809 ,  H05K1/0393 ,  H05K1/113 ,  H05K1/118 ,  H05K1/165 ,  H05K3/4617 ,  H05K3/4644

Abstract: A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first, second and third buildup bodies modular and stackable. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first, second and third buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.

公开(公告)号：US20170103844A1

公开(公告)日：2017-04-13

申请号：US14877981

申请日：2015-10-08

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H01F27/28 ,  H01F41/04

CPC classification number: H01F27/2804 ,  H01F41/041 ,  H01F2027/2809 ,  H05K1/00 ,  H05K1/165 ,  H05K3/00 ,  H05K3/4635 ,  H05K2201/09063

Abstract: A winged coil structure and a method of manufacturing the same are disclosed. The winged coil structure includes an upper flexible plate, at least one upper magnetic induction coil, at least one upper connection pad, a lower flexible plate, at least one lower magnetic induction coil, at least one lower connection pad, at least one gold finger, a dielectric layer and at least one connection plug. The connection plug connects the upper connection pad and the lower connection pad through thermal pressing such that the gold finger, the upper magnetic induction coil, the upper connection pad, the lower connection pad, the connection plug, the lower connection pad and the lower magnetic induction coil are electrically connected. The upper flexible plate is provided with notched lines to be easily bent without damage to the upper and lower magnetic induction coils. Thus, a bendable feature for magnetic induction coils is provided.

公开(公告)号：US20160262267A1

公开(公告)日：2016-09-08

申请号：US14641016

申请日：2015-03-06

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Jaen-Don Lan ,  Yung-Lin Chia ,  An-Ping Tseng

IPC: H05K3/06 ,  H05K3/00 ,  H05K1/18

CPC classification number: H05K3/064 ,  H01L23/5389 ,  H05K1/185 ,  H05K1/188 ,  H05K3/0008 ,  H05K3/108 ,  H05K3/305 ,  H05K3/425 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2203/166

Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 μm so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 μm so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract translation: 一种制造具有高密度引脚数的埋入元件的电路板的方法，其中通过图案化干电镀电镀形成在第一电路中的微铜窗容易控制在小于50μm，从而在激光钻孔之后形成的微导电孔 每个具有大大缩小到小于50μm的直径，从而高度增加微通孔的密度，从而便于以高密度引脚数掩埋埋入元件。 此外，通过将相同高度的微通孔设置在一起，可精确地控制掩埋元件的固定位置的光学对准。

公开(公告)号：US09406641B2

公开(公告)日：2016-08-02

申请号：US13938335

申请日：2013-07-10

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yi-Fan Kao ,  Shuo-Hsun Chang ,  Yu-Te Lu ,  Kuo-Chun Huang

IPC: H01L23/00 ,  H01L23/31 ,  H05K3/46 ,  H01L23/498 ,  H05K1/02 ,  H05K1/18 ,  H01L25/10

CPC classification number: H01L24/81 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/562 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3511 ,  H05K1/0206 ,  H05K1/0271 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a through-opening and bonding to a Non-conductive Film to bond to a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract translation: Flip-Chip Chip-Scale封装的复合载体板结构及其制造方法提供了一种具有通孔的翻转区和与非导电膜结合以结合到载体板以形成化合物载体的底板 板结构。 底板由低热膨胀系数材料构成。

公开(公告)号：US09095084B2

公开(公告)日：2015-07-28

申请号：US13853303

申请日：2013-03-29

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yu-Te Lu ,  De-Hao Lu

IPC: H05K1/00 ,  H05K1/09 ,  H05K1/03 ,  H05K1/11 ,  H05K3/46 ,  H05K3/38

CPC classification number: H05K3/4647 ,  H05K1/0366 ,  H05K3/38

Abstract: A stacked multilayer structure, including a first circuit layer having bumps, a plastic film stacked on the first circuit layer to fill up the space among the bumps so as to form a co-plane, and a second circuit layer formed on the co-plane and connected to the first circuit layer. The plastic film includes a glass fiber layer which is embedded and not exposed.

Abstract translation: 一种堆叠多层结构，包括具有凸起的第一电路层，堆叠在第一电路层上以填充凸块之间的空间以形成共面的塑料膜，以及形成在共面上的第二电路层 并连接到第一电路层。 该塑料膜包括嵌入并不暴露的玻璃纤维层。

公开(公告)号：US20140295623A1

公开(公告)日：2014-10-02

申请号：US13853255

申请日：2013-03-29

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yu-Te Lu ,  De-Hao Lu

IPC: H01L21/56

CPC classification number: H01L21/4846 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/562 ,  H01L2221/68345 ,  H01L2224/73204

Abstract: Disclosed is a method of packaging a chip and a substrate, including the steps of forming a substrate with a thickness ranging from 70 to 150 μm, which comprises a dielectric layer, a circuit metal layer stacked on the dielectric layer and bonding pads higher than the dielectric layer by 10 to 15 μm; forming a stabilizing structure around the substrate to provide a receiving space; disposing the chip on the receiving space and bonding the pins of the chip with the bonding pads; and filling up the receiving space under the chip with a filling material to a total thickness ranging from 300 to 850 μm. Without the plastic molding process, the present invention reduces the cost and the total thickness, and further prevents the substrate from warping by use of the stabilizing fixing structure.

Abstract translation: 公开了一种封装芯片和基板的方法，包括以下步骤：形成厚度范围为70-150μm的基板，该基板包括介电层，堆叠在电介质层上的电路金属层和高于 介电层10〜15μm; 在所述基板周围形成稳定结构以提供接收空间; 将芯片放置在接收空间上，并将芯片的引脚与焊盘接合; 并用填充材料填充芯片下方的接收空间，总厚度为300至850μm。 没有塑料成型工艺，本发明降低了成本和总厚度，并且通过使用稳定固定结构进一步防止了基板翘曲。