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    METHOD FOR MANUFACTURING A MICRO ELECTRO-MECHANICAL SYSTEM
    53.
    发明申请
    METHOD FOR MANUFACTURING A MICRO ELECTRO-MECHANICAL SYSTEM 审中-公开

    公开(公告)号：US20180282154A1

    公开(公告)日：2018-10-04

    申请号：US15685957

    申请日：2017-08-24

    Applicant: Kionix, Inc.

    Inventor： Martin Heller ,  Jonah deWall ,  Andrew Hocking ,  Kristin Lynch ,  Sangtae Park

    IPC: B81C1/00

    CPC classification number: B81C1/00269 ,  B81C2201/013 ,  B81C2201/0171 ,  B81C2201/0197 ,  B81C2201/05 ,  B81C2203/0118

    Abstract: A method of fabricating a semiconductor device, includes, in part, growing a first layer of oxide on a surface of a first semiconductor substrate, forming a layer of insulating material on the oxide layer, patterning and etching the insulating material and the first oxide layer to form a multitude of oxide-insulator structures and further to expose the surface of the semiconductor substrate, growing a second layer of oxide in the exposed surface of the semiconductor substrate, and removing the second layer of oxide thereby to form a cavity in which a MEMS device is formed. The process of growing oxide in the exposed surface of the cavity and removing this oxide may be repeated until the cavity depth reaches a predefined value. Optionally, a multitude of bump stops is formed in the cavity.

    Pseudo SOI process
    54.
    发明授权
    Pseudo SOI process 有权

    公开(公告)号：US10053360B1

    公开(公告)日：2018-08-21

    申请号：US15685879

    申请日：2017-08-24

    Applicant: Kionix, Inc.

    Inventor： Martin Heller

    IPC: H01L21/00 ,  B81C1/00

    CPC classification number: B81C1/00047 ,  B81C1/00095 ,  B81C2201/0109 ,  B81C2201/0115 ,  B81C2201/0132 ,  B81C2201/0171 ,  B81C2201/0178

    Abstract: A method of processing a semiconductor substrate having a first conductivity type includes, in part, forming a first implant region of a second conductivity type in the semiconductor substrate where the first implant region is characterized by a first depth, forming a second implant region of the first conductivity type in the semiconductor substrate where the second implant region is characterized by a second depth smaller than the first depth, forming a porous layer within the semiconductor substrate where the porous layer is adjacent the first implant region, and growing an epitaxial layer on the semiconductor substrate thereby causing the porous layer to collapse and form a cavity.

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