公开(公告)号：US12170313B2

公开(公告)日：2024-12-17

申请号：US18324637

申请日：2023-05-26

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Anthony K. Stamper ,  John J. Ellis-Monaghan ,  Steven M. Shank ,  Rajendran Krishnasamy

IPC: H01L29/06 ,  H01L21/763 ,  H01L29/08 ,  H01L29/165 ,  H01L29/66 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.

公开(公告)号：US12159926B2

公开(公告)日：2024-12-03

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US12046633B2

公开(公告)日：2024-07-23

申请号：US17157269

申请日：2021-01-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Johnatan A. Kantarovsky ,  Vibhor Jain

IPC: H01L29/06 ,  H01L21/308 ,  H01L21/764 ,  H01L27/06 ,  H01L27/07 ,  H01L29/08

CPC classification number: H01L29/0657 ,  H01L21/308 ,  H01L21/764 ,  H01L27/0635 ,  H01L27/0755 ,  H01L29/0653 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to airgap structures in a doped region under one or more transistors and methods of manufacture. The structure includes: a semiconductor material comprising a doped region; one or more sealed airgap structures breaking up the doped region of the semiconductor material; and a field effect transistor over the one or more sealed airgap structures and the semiconductor material.

公开(公告)号：US12027553B2

公开(公告)日：2024-07-02

申请号：US17896401

申请日：2022-08-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Siva P. Adusumilli ,  Vibhor Jain ,  Alvin J. Joseph ,  Steven M. Shank

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/1462 ,  H01L27/1463 ,  H01L27/14685

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors with buried airgap mirror reflectors. The structure includes a photodetector and at least one airgap in a substrate under the photodetector.

公开(公告)号：US20240172455A1

公开(公告)日：2024-05-23

申请号：US17990800

申请日：2022-11-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： John J. Pekarik ,  Hong Yu ,  Vibhor Jain ,  Alexander Derrickson ,  Venkatesh Gopinath

IPC: H01L47/00 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L27/2445 ,  H01L29/66242 ,  H01L29/7371 ,  H01L45/1233 ,  H01L45/16

Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a substrate having a top surface, a trench isolation region in the substrate, and a base layer on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor includes a first collector in the substrate and a first emitter on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor includes a second collector in the substrate and a second emitter on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.

公开(公告)号：US20240170561A1

公开(公告)日：2024-05-23

申请号：US17990931

申请日：2022-11-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vibhor Jain ,  Jeffrey Johnson ,  Viorel Ontalus ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7378 ,  H01L29/0817 ,  H01L29/66242

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an emitter, a collector including a first section, a second section, and a third section positioned in a first direction between the first section and the second section, and an intrinsic base disposed in a second direction between the emitter and the third section of the collector. The structure further comprises a stress layer including a section positioned to overlap with the emitter, the intrinsic base, and the collector. The section of the stress layer is surrounded by a perimeter, and the first and second sections of the collector are each positioned adjacent to the perimeter of the stress layer.

公开(公告)号：US11949004B2

公开(公告)日：2024-04-02

申请号：US17533882

申请日：2021-11-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Vibhor Jain ,  Alexander M. Derrickson

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7393 ,  H01L29/0649 ,  H01L29/66325

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and a gate structure comprising a gate oxide and a gate control in a same channel region as the extrinsic base region.

公开(公告)号：US11935927B2

公开(公告)日：2024-03-19

申请号：US17684321

申请日：2022-03-01

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hong Yu ,  Vibhor Jain

IPC: H01L29/417 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/735 ,  H01L29/737

CPC classification number: H01L29/41708 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/0817

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with a collector contact and methods of manufacture. The structure includes: a lateral bipolar transistor which includes an emitter, a base and a collector; an emitter contact to the emitter; a base contact to the base; and a collector contact to the collector and extending to an underlying substrate underneath the collector.

公开(公告)号：US20240072180A1

公开(公告)日：2024-02-29

申请号：US17896711

申请日：2022-08-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Saloni Chaurasia ,  Jeffrey Johnson ,  Vibhor Jain ,  Crystal R. Kenney ,  Sudesh Saroop ,  Teng-Yin Lin ,  John J. Pekarik

IPC: H01L29/93 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/93 ,  H01L29/1095 ,  H01L29/66174

Abstract: Structures for a varactor diode and methods of forming same. The structure comprises a first semiconductor layer including a section on a substrate, a second semiconductor layer on the section of the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, and a doped region in the section of the first semiconductor layer. The section of the first semiconductor layer and the doped region have a first conductivity type, and the second semiconductor layer comprises silicon-germanium having a second conductivity type opposite to the first conductivity type, and the third semiconductor layer has the second conductivity type. The doped region contains a higher concentration of a dopant of the first conductivity type than the section of the first semiconductor layer. The second semiconductor layer abuts the first section of the first semiconductor layer along an interface, and the doped region is positioned adjacent to the interface.

公开(公告)号：US11876123B2

公开(公告)日：2024-01-16

申请号：US17214969

申请日：2021-03-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Renata A. Camillo-Castillo

IPC: H01L21/762 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06 ,  H01L29/737 ,  H01L29/732

CPC classification number: H01L29/66242 ,  H01L21/762 ,  H01L21/76224 ,  H01L29/0603 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66272 ,  H01L29/7371 ,  H01L29/732

Abstract: According to a semiconductor device herein, the device includes a substrate. An active device is formed in the substrate. The active device includes a collector region, a base region formed on the collector region, and an emitter region formed on the base region. An isolation structure is formed in the substrate around the active device. A trench filled with a compressive material is formed in the substrate and positioned laterally adjacent to the emitter region and base region. The trench extends at least partially into the collector region.