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公开(公告)号:KR1020020023540A
公开(公告)日:2002-03-29
申请号:KR1020000055850
申请日:2000-09-22
Applicant: 삼성전자주식회사
IPC: G02F1/136
Abstract: PURPOSE: A thin film transistor substrate for a liquid crystal display and a method for manufacturing the same are provided to form gate lines and data lines with aluminium such as AlNd of low resistance to be applied to a large-scaled screen LCD and secure a maintenance capacity simultaneously with a maximum open ratio by forming maintenance capacity electrodes with transparent conductive material such as IZO(Indium Zinc Oxide). CONSTITUTION: A thin film transistor substrate for a liquid crystal display includes a first insulation substrate, gate lines(21-23) formed on the first substrate, first maintenance capacity electrodes(31) formed with a transparent conductive material on the substrate, data lines(71-74) insulated from the gate lines, second maintenance capacity electrodes(81) formed with a transparent conductive material and at least partially overlapped with the first maintenance capacity electrodes, switching elements connected to the gate and data lines, and pixel electrodes(100) connected to the switching elements.
Abstract translation: 目的:提供一种用于液晶显示器的薄膜晶体管基板及其制造方法,以形成具有低电阻的铝的门线和数据线,以应用于大型屏幕LCD并确保维护 通过用诸如IZO(氧化铟锌)的透明导电材料形成维持电容电极,同时具有最大开放比。 构成:用于液晶显示器的薄膜晶体管基板包括第一绝缘基板,形成在第一基板上的栅极线(21-23),在基板上形成有透明导电材料的第一维护电极电极(31),数据线 (71-74),与所述栅极线绝缘的第二维持电极电极(81),形成有透明导电材料并且与所述第一维持电极电极至少部分重叠,连接到所述栅极和数据线的开关元件以及像素电极( 100)连接到开关元件。
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公开(公告)号:KR1020020017313A
公开(公告)日:2002-03-07
申请号:KR1020000050539
申请日:2000-08-29
Applicant: 삼성전자주식회사
IPC: G02F1/1333
Abstract: PURPOSE: A vertical alignment type liquid crystal display is provided to distort electric fields by forming protrusions overlapping openings partially to reinforce fringe fields, thereby improving the response time and stabilizing domains. CONSTITUTION: A vertical alignment type liquid crystal display includes an insulation substrate(100), pixel electrodes(130) formed on the insulation substrate and having first and second openings(131,132), and insulation protrusions(140) formed on the pixel electrodes and covering the first openings, wherein the first and second openings are disposed alternately and common electrode lines(110) are aligned partially overlapping the second openings.
Abstract translation: 目的:提供垂直取向型液晶显示器,通过形成部分凸起重叠开口以加强边缘场来扭曲电场,从而改善响应时间和稳定区域。 构成:垂直取向型液晶显示器包括绝缘基板(100),形成在绝缘基板上的具有第一和第二开口(131,132)的像素电极(130)和形成在像素电极上的绝缘突起(140) 所述第一开口,其中所述第一和第二开口交替布置,并且公共电极线(110)部分地与所述第二开口重叠。
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公开(公告)号:KR1020000066451A
公开(公告)日:2000-11-15
申请号:KR1019990013558
申请日:1999-04-16
Applicant: 삼성전자주식회사
Inventor: 최재호
IPC: H01L27/10
Abstract: PURPOSE: A thin film transistor array substrate is provided to reduce a manufacturing cost by preventing a wiring shortcircuit during a manufacturing process. CONSTITUTION: A thin film transistor array substrate comprises an insulating substrate, a gate wiring, a gate insulating layer, an auxiliary data line(40), a semiconductor layer, a data wiring, a protection layer, and a pixel electrode(120). The gate wiring comprises a gate line(20), and a gate electrode(21). The gate insulating layer covers the gate wiring. The auxiliary data line comprises separated first portion and second portion. The semiconductor layer is formed on an upper portion of the gate electrode. The data wiring comprises a data line(80,90,100), a source electrode, and a drain electrode(102). The protection layer comprises a first contact hole(51) and an opening portion(114). The pixel electrode is connected with the drain electrode.
Abstract translation: 目的:提供薄膜晶体管阵列基板,以通过在制造过程中防止布线短路来降低制造成本。 构成:薄膜晶体管阵列基板包括绝缘基板,栅极布线,栅极绝缘层,辅助数据线(40),半导体层,数据布线,保护层和像素电极(120)。 栅极布线包括栅极线(20)和栅电极(21)。 栅极绝缘层覆盖栅极布线。 辅助数据线包括分离的第一部分和第二部分。 半导体层形成在栅电极的上部。 数据线包括数据线(80,90,100),源电极和漏电极(102)。 保护层包括第一接触孔(51)和开口部分(114)。 像素电极与漏电极连接。
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公开(公告)号:KR1020000013408A
公开(公告)日:2000-03-06
申请号:KR1019980032250
申请日:1998-08-07
Applicant: 삼성전자주식회사
IPC: H01L21/027
Abstract: PURPOSE: Each liquid temperature regulator for constantly maintaining the temperatures of a stage and a lens is set up to minimize the change of a performance according to the change of environment in the photo exposure device of semiconductor. When such liquid temperature regulators are used for a long time, the efficiency of the cooling medium decreases requiring checking and supplementation. But because the cover which opens and closes the medium injecting hole is made of opaque materials and simply unites as twilled texture in the existing liquid temperature regulators, the cover should be removed to check the medium and even the removal itself is an inconvenience. CONSTITUTION: A cover (2) has more than two transparent windows (3) and a handle (4) used at the opening and the closing is formed on the center of the cover (2). So the frequency of the opening and the closing is decreased due to the transparent windows through which the medium is checked, and the removal and the setting of the cover is convenient at the opening and the closing by using the handle.
Abstract translation: 目的:设置用于不断维持平台和透镜温度的每个液体温度调节器,以根据半导体照相曝光装置的环境变化来最小化性能的变化。 当这种液体温度调节器长时间使用时,冷却介质的效率降低,需要检查和补充。 但是由于打开和关闭介质注入孔的盖子由不透明材料制成,并且在现有的液体温度调节器中简单地组合为斜纹纹理,所以应该移除盖子以检查介质,甚至移除本身也是不方便的。 构成:盖(2)具有多于两个透明窗(3)和在开口处使用的手柄(4),并且封盖形成在盖(2)的中心。 因此,通过检查介质的透明窗口,打开和关闭的频率降低,并且通过使用手柄在打开和关闭时移除和设置盖子是方便的。
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公开(公告)号:KR1019990026065A
公开(公告)日:1999-04-15
申请号:KR1019970048036
申请日:1997-09-22
Applicant: 삼성전자주식회사
IPC: H01L23/02
Abstract: 본 발명은 반도체 패키지 몰딩 설비 및 이에 대한 크리닝 방법에 관한 것으로, 종래에 몰딩 설비에 대한 크리닝 공정을 작업자의 수작업을 통해 하던 것을 본 발명에서는 크리닝용 몰드 프레임 저장부와 크리닝용 몰딩수지 저장부를 몰딩 설비에 설치하여 크리닝 주기가 되었을 때, 이를 판단하여 크리닝 공정을 자동으로 실행함으로써, 크리닝 공정을 보다 신속하게 처리하여 제품의 생산을 향상시킬 수 있다.
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公开(公告)号:KR1019980034129A
公开(公告)日:1998-08-05
申请号:KR1019960052088
申请日:1996-11-05
Applicant: 삼성전자주식회사
IPC: H01L23/28
Abstract: 본 발명은 다이 패드의 구조에 관한 것으로, 상부 면 및 하부 면에 각기 이격되어 복수 개의 요 부가 형성되어 있으며, 상부 면 및 하부 면을 관통하는 복수 개의 관통 구멍을 갖는 것을 특징으로 하는 다이 패드의 구조를 제공함으로써, 다이 패드의 상부 면에 형성된 요 부의 내부에 접착제가 충전되어 반도체 칩과의 접착력을 증가시켜, 계면 박리를 방지하는 한편, 다이 패드의 하부 면에 형성된 요 부 및 관통 구멍에 의하여 추후 성형 공정에 의해 성형 수지가 충전되어 패키지 몸체간의 결합력을 증가시켜 패키지 크랙을 방지할 수 있는 것을 특징으로 한다.
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公开(公告)号:KR1019970058438A
公开(公告)日:1997-07-31
申请号:KR1019950068151
申请日:1995-12-30
Applicant: 삼성전자주식회사
IPC: H05K3/34
Abstract: 본 발명은 볼 그리드 어레이용 인쇄회로기판에 관한 것으로, 성형 공정시 인쇄회로기판과 성형 금형의 게이트가 접하는 부분을 제거함으로써, 상기 인쇄회로기판의 상부면 상에 도포된 솔더 레지스트(solder resist)와 성형 수지간의 강한 결합력에 의해 디게이팅(degating)시에 발생되는 성형 수지와 인쇄회로기판간의 박리현상(delamination)을 방지할 수 있는 특징을 갖는다.
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80.
公开(公告)号:KR1020120085360A
公开(公告)日:2012-08-01
申请号:KR1020110006617
申请日:2011-01-24
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L21/28273 , H01L27/11531 , H01L27/11517
Abstract: PURPOSE: A gate structure, a forming method thereof, and a method of manufacturing a semiconductor device using the same are provided to prevent an electric field from becoming concentrated on the gate structure by forming a second oxide film on a nitride film through an anisotropic plasma oxidation process. CONSTITUTION: A tunnel insulating film pattern(115) and a floating gate(125) are successively formed on a substrate(100). A first oxide film and a nitride film are successively formed on the floating gate. A dielectric layer pattern(185) is formed on the upper side and a sidewall of the floating gate and a sidewall of the tunnel insulating film pattern. The dielectric layer pattern comprises a first oxide film pattern(155), a nitride pattern(165), and a second oxide film pattern(175). A control gate(195) is formed on the dielectric layer pattern.
Abstract translation: 目的:提供一种栅极结构及其形成方法以及使用该栅极结构的半导体器件的制造方法,以通过各向异性等离子体在氮化物膜上形成第二氧化膜来防止电场集中在栅极结构上 氧化过程。 构成:在衬底(100)上依次形成隧道绝缘膜图案(115)和浮动栅极(125)。 在浮栅上依次形成第一氧化膜和氮化物膜。 介电层图案(185)形成在浮动栅极的上侧和侧壁以及隧道绝缘膜图案的侧壁上。 电介质层图案包括第一氧化膜图案(155),氮化物图案(165)和第二氧化膜图案(175)。 在电介质层图案上形成控制栅极(195)。
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