Abstract:
유도 결합형 플라즈마의 반응성 이온 식각 장비를 이용한 원스톱 공정에 의한 하향식 실리콘 나노선 제조 방법이 개시된다. 상기 실리콘 나노선 제조 방법은 포토리소그래피 공정을 통해 기판의 소자 형성층에 포토레지스트 선 패턴을 형성하는 단계, 상기 포토레지스트 선 패턴의 크기 축소화를 통해 나노미터 선폭의 포토레지스트 선 패턴을 형성하는 단계, 및 상기 나노미터 선폭의 포토레지스트 선 패턴을 마스크층으로 하여 상기 소자 형성층으로 실리콘 나노선을 형성하는 단계를 포함한다.
Abstract:
PURPOSE: An apparatus for maintaining wafer loading is provided to prevent wafer slip by driving a wafer separation prevention driving part which is mounted on a wafer carrier. CONSTITUTION: A wafer(200) is loaded on a wafer carrier. A wafer detection part(10) is combined with the wafer carrier and senses the wafer. A wafer separation prevention driving part is combined with one side of the wafer carrier. The wafer separation prevention driving part prevents wafer from being separated. A controlling part(30) supplies a driving control signal to the wafer separation prevention driving part and maintains a wafer loading state.
Abstract:
유도 결합형 플라즈마의 반응성 이온 식각 장비를 이용한 원스톱 공정에 의한 하향식 실리콘 나노선 제조 방법이 개시된다. 상기 실리콘 나노선 제조 방법은 포토리소그래피 공정을 통해 기판의 소자 형성층에 포토레지스트 선 패턴을 형성하는 단계, 상기 포토레지스트 선 패턴의 크기 축소화를 통해 나노미터 선폭의 포토레지스트 선 패턴을 형성하는 단계, 및 상기 나노미터 선폭의 포토레지스트 선 패턴을 마스크층으로 하여 상기 소자 형성층으로 실리콘 나노선을 형성하는 단계를 포함한다.
Abstract:
PURPOSE: An apparatus for condensing sunlight is provided to increase the photoelectric conversion efficiency of a solar cell by collecting uneven light over the surface of the solar cell. CONSTITUTION: In an apparatus for condensing sunlight, A body(12) has a disc shape including one side facing to a condensing side of a solar cell. A plurality of prisms(14) is formed in one side. . A plurality of prisms are formed in compartmentalized collection areas having identical space between them along circumferential direction. A plurality of prisms has different angles at each collection area Incident lights on the prisms are reflected by same angle and are projected to the condensing side. The condensing side has uniform light distribution substantially.
Abstract:
PURPOSE: A solar cell with a surface structure for reducing reflectivity and a manufacturing method thereof are provided to maximize photoelectric conversion efficiency by uniformly maintaining the reflectivity of a solar cell regardless of the wavelength of light. CONSTITUTION: A solar cell includes a silicon substrate. The silicon substrate includes a first surface and a second surface to which light is inputted. The second surface is opposite to the first surface. A first surface(101) includes a first opening(1011) and a second opening(1013). The direction of the first opening is inclined to the first surface.
Abstract:
A method for forming a ZnO nano-crystal directly on a silicon substrate is provided to omit additional processes when forming a silicon substrate based photoelectric cell by forming the amorphous ZnO-nano crystal within a Zn-Si-O complex thin film directly. In a method for forming a ZnO nano-crystal directly on a silicon substrate, a Zn-Si-O complex thin film is formed on a semiconductor substrate, and the Zn-Si-O complex thin film is annealed. Wherein, the ZnO nano crystal is formed within an amorphous Zn-Si-O complex thin film on a silicon substrate, and the Zn-Si-O complex thin film is formed by using a sputtering method.
Abstract:
본 발명은 상변화 물질의 접촉면적을 최대한 줄임으로써 저전력 및 고집적 특성을 갖는 상변화 물질을 이용한 상변화 메모리 및 그 제조방법에 관한 것이다. 이를 위해, 본 발명은 절연막/하부전극/기판에 상변화 물질을 증착하고 건식 식각을 통해 수직으로 에칭하여 절연막/하부전극의 벽면을 따라 상변화 물질의 스페이서가 형성되도록 하여 하부전극의 두께로 상변화 물질의 접촉면적이 결정될 수 있도록 한다. 또한, 트렌치 구조의 내부에 하부전극을 형성하고 상변화 물질을 증착한 후 건식 식각을 통해 수직으로 에칭하여 절연막의 벽면을 따라 상변화 물질의 스페이서가 형성되도록 하여 상변화 물질의 두께로 상변화 물질의 접촉면적이 결정될 수 있도록 한다.
Abstract:
PURPOSE: A method for growing quantum wires with various sizes on one substrate is provided by growing a triangular epitaxial layer with various sizes through a selective epitaxial growing method. CONSTITUTION: An oxide layer is deposited on a substrate. The oxide layer is etched so as to have a various sized area without an oxide layer. A triangular structure of the various sized area without the oxide layer is grown by a selective epitaxial growing method. The growing characteristic and surface characteristic in an epitaxial layer of the triangular structure is improved by controlling the rate of epitaxial growth. The rate of epitaxial growth is 0.52μm/hour in case of AlGaAs, and 0.7μm/hour in case of GaAs or InGaAs.
Abstract:
PURPOSE: A connecting method of a ferroelectric memory cell and a ferroelectric memory thereby are provided to perform a reading process and a writing process on a selected cell alone without interference between cells by connecting upper electrodes and sources of FETs(Field Effect Transistors) in columns and lower electrodes and drains of the FETs in rows using bit lines and word lines. CONSTITUTION: A ferroelectric memory cell array includes a plurality of ferroelectric memory cells. Each cell(1) includes a FET. The FET includes an upper electrode(2) and a lower electrode(3) of a gate with a metal-ferroelectric-metal-insulator-silicon structure, a source(4) and a drain(5). The upper electrode is connected to a write bit line(6) in column. The lower electrode is connected to a write word line(7) in row. The source is connected to a read bit line(9) in column. The drain is connected to a read word line(8) in row.
Abstract:
PURPOSE: A method of manufacturing a ferroelectric gate is provided to improve characteristics of the gate by using oxygen plasma RTA(Rapid Thermal Annealing). CONSTITUTION: Oxygen plasma RTA is performed for a ferroelectric thin film under a predetermined pressure. The ferroelectric thin film is used as a gate oxide layer. The temperature of RTA is in the range of 600 to 700 °C. The RTA period is in the range of 5 to 10 minutes. The power of 30 to 50 Watt is applied in order to generate oxygen plasma. The predetermined pressure of the RTA is 10¬-1 to 10¬-2 Torr. Oxygen concentration of the ferroelectric thin film is increased due to the oxygen plasma RTA.