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公开(公告)号:SE1250374A1
公开(公告)日:2013-10-14
申请号:SE1250374
申请日:2012-04-13
Applicant: SILEX MICROSYSTEMS AB
Inventor: EBEFORS THORBJOERN , PERTTU DANIEL
IPC: H01L23/32 , H01L23/498 , H01L23/52 , H01L23/538
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公开(公告)号:CA2519893C
公开(公告)日:2013-03-12
申请号:CA2519893
申请日:2004-03-22
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , EBEFORS THORBJOERN , SVEDIN NIKLAS , RANGSTEN PELLE , SCHOENBERG TOMMY
IPC: H01L21/60 , B81B7/00 , H01L21/768 , H01L23/48 , H01L29/40
Abstract: The invention relates to a method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate. It comprising creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of said substrate, defined by said trench. It also relates to a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, comprising a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through said substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and comprises the same material as the substrate, i.e. it is made from the wafer material.
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公开(公告)号:SE534509C2
公开(公告)日:2011-09-13
申请号:SE0950857
申请日:2006-12-14
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , EBEFORS THORBJOERN , CORMAN THIERRY
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公开(公告)号:AT511703T
公开(公告)日:2011-06-15
申请号:AT07709445
申请日:2007-01-31
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , BAUER TOMAS , EBEFORS THORBJOERN
IPC: H01L21/768 , H01L23/48 , H01L23/522
Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).
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公开(公告)号:SE1150413A1
公开(公告)日:2011-05-10
申请号:SE1150413
申请日:2008-11-19
Applicant: SILEX MICROSYSTEMS AB
Inventor: EBEFORS THORBJOERN , KAELVESTEN EDVARD , BAUER TOMAS
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公开(公告)号:SE533308C2
公开(公告)日:2010-08-24
申请号:SE0801620
申请日:2007-01-31
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , BAUER TOMAS , EBEFORS THORBJOERN
IPC: H01L21/768 , H01L23/48 , H01L23/498 , H01L23/532
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公开(公告)号:SE1050461A1
公开(公告)日:2010-05-10
申请号:SE1050461
申请日:2007-01-31
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , BAUER TOMAS , EBEFORS THORBJOERN
IPC: H01L21/768 , H01L23/48 , H01L23/498 , H01L23/532
Abstract: Uppfinningen avser an halvledaranordning innefattande ett dopat skivsubstråt (70) på eller i vilket det finns ett motsatt dopat skikt (72) anordnat, varvid en diodstruktur föreligger. Det finns också minst en via (76) som sträcker sig genom skivsubstratet. Vian står i elektrisk förbindelse med endera av skivsubstratet eller det motsatt dopade skiktet. En metod för att integrera en diod i en kiselskiva tillhandahålles också.(Fig. 4)
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公开(公告)号:SE0950857L
公开(公告)日:2007-06-15
申请号:SE0950857
申请日:2006-12-14
Applicant: SILEX MICROSYSTEMS AB
Inventor: KAELVESTEN EDVARD , EBEFORS THORBJOERN , CORMAN THIERRY
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89.
公开(公告)号:AU2003206552A1
公开(公告)日:2003-09-04
申请号:AU2003206552
申请日:2003-02-14
Applicant: SILEX MICROSYSTEMS AB
Inventor: SVEDIN NIKLAS , WESTIN HAKAN , KALVESTEN EDVARD , EBEFORS THORBJORN
IPC: B81B3/00 , B81B7/04 , G02F1/29 , H01L21/00 , H01L21/30 , H01L21/302 , H01L21/46 , H01L21/461
Abstract: A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.
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公开(公告)号:SE0102925L
公开(公告)日:2003-04-30
申请号:SE0102925
申请日:2001-08-31
Applicant: SILEX MICROSYSTEMS AB
Inventor: NIKLAUS FRANK , STEMME GOERAN
IPC: B81B3/00 , B81B7/04 , B81C1/00 , H01L20060101 , H01L21/70
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