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公开(公告)号：KR101148735B1
公开(公告)日：2012-05-23
申请号：KR1020100068358
申请日：2010-07-15
Applicant: 삼성전기주식회사
Abstract: 본 발명은 인쇄회로기판 및 그 제조방법에 관한 것으로서, 절연층과; 상기 절연층에 매립되는 제1회로패턴과; 상기 제1회로패턴이 매립된 절연층 상에 형성되는 제1솔더레지스트층과; 상기 절연층, 상기 제1회로패턴 및 상기 제1솔더레지스트층 중 하나 또는 2 이상의 상부에 형성되는 제2회로패턴과; 상기 제1솔더레지스트층 상에 형성되며 접속단자를 노출시키는 개구부를 갖는 제2솔더레지스트층을 포함한다.
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公开(公告)号：KR101141209B1
公开(公告)日：2012-05-04
申请号：KR1020100009192
申请日：2010-02-01
Applicant: 삼성전기주식회사
CPC classification number: H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
Abstract: A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.
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公开(公告)号：KR1020110089687A
公开(公告)日：2011-08-09
申请号：KR1020100009192
申请日：2010-02-01
Applicant: 삼성전기주식회사
CPC classification number: H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
Abstract: PURPOSE: A single layered printed circuit board and a manufacturing method thereof are provided to implement high integration of the device while saving manufacturing costs. CONSTITUTION: A single layered printed circuit board and a manufacturing method thereof are comprised of steps: forming a bond pad, circuit pattern, and a post on an insulating film(S110); pressing an insulator in the surface of the insulating film(S120); selectively etching insulator to expose the end of the post(S130); opening a part of the insulating film to expose at least part of a bond pad to outside(S140); combining a solder ball in the end of the post; and mounting a electronic device on the insulator to be contacted with the exposed bonding pad(S150).
Abstract translation: 目的：提供单层印刷电路板及其制造方法，以实现装置的高集成度，同时节省制造成本。 构成：单层印刷电路板及其制造方法包括以下步骤：在绝缘膜上形成接合焊盘，电路图案和柱（S110）; 在绝缘膜的表面压制绝缘体（S120）; 选择性地蚀刻绝缘体以露出柱的端部（S130）; 打开绝缘膜的一部分以将至少部分接合垫暴露于外部（S140）; 在柱的末端组合焊球; 以及将电子器件安装在绝缘体上以与暴露的焊盘接触（S150）。
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公开(公告)号：KR1020110081796A
公开(公告)日：2011-07-14
申请号：KR1020110062256
申请日：2011-06-27
Applicant: 삼성전기주식회사
IPC: H01L21/60
CPC classification number: H01L24/97 , H01L2224/48091 , H01L2224/4824 , H01L2924/15311 , H01L2924/00014
Abstract: PURPOSE: A manufacturing method for a ball grid array board and a semiconductor chip package are provided to implement high density circuit pattern by burying a circuit pattern in an insulating layer. CONSTITUTION: In a manufacturing method for a ball grid array board and a semiconductor chip package, a first circuit pattern and a second circuit pattern are formed respectively on a metal carrier and a second metal carrier. A fist side(111) is laminated to be contacted to a release material(150) which is formed between a first side and the second side(112), which are opposite to each other. The first and the second circuit pattern are buried the second side of the first and second insulating layers respectively. The first and the second metal carrier are eliminated. The release material is removed to divide the first and second insulation layers. An opening is formed in the first and second insulting layers respectively to connect the first side to the second side.
Abstract translation: 目的：提供一种用于球栅阵列板和半导体芯片封装的制造方法，以通过将电路图案埋入绝缘层来实现高密度电路图案。 构成：在球栅阵列板和半导体芯片封装的制造方法中，分别在金属载体和第二金属载体上形成第一电路图案和第二电路图案。 第一侧（111）层叠以与形成在彼此相对的第一侧和第二侧（112）之间的释放材料（150）接触。 第一和第二电路图案分别埋在第一和第二绝缘层的第二侧。 第一和第二金属载体被去除。 去除剥离材料以分隔第一和第二绝缘层。 分别在第一和第二绝缘层中形成开口以将第一侧连接到第二侧。
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公开(公告)号：KR101032702B1
公开(公告)日：2011-05-06
申请号：KR1020100035873
申请日：2010-04-19
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A method of manufacturing a printed circuit board for a semiconductor package is provided to reduce manufacturing time and simplify a process by forming a post through imprint. CONSTITUTION: A metal plate(111) is imprinted to form a post(112). An insulating layer(120) is laminated so that the post is exposed to one side of the metal plate. The metal plate in which the insulating layer is laminated is patterned to form a circuit pattern(115). A solder bump(140) is formed on the lower end part of the exposed post through the opening.
Abstract translation: 目的：提供一种制造用于半导体封装的印刷电路板的方法，以通过压印形成柱而减少制造时间并简化工艺。 构成：金属板（111）被压印以形成柱（112）。 层叠绝缘层（120），使得柱子暴露于金属板的一侧。 将绝缘层层压的金属板图案化以形成电路图案（115）。 通过开口在暴露的柱的下端部上形成焊料凸点（140）。
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Patent Agency Ranking
公开(公告)号：KR1020110010427A
公开(公告)日：2011-02-01
申请号：KR1020090067990
申请日：2009-07-24
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A printed circuit board and a manufacturing method thereof are provided to improve the density of a circuit pattern by burying the circuit pattern into an insulating body. CONSTITUTION: A first circuit pattern is formed on the surface of a carrier. A second circuit pattern is buried to both sides of a substrate. The carrier is compressed to the substrate in order to bury the first circuit pattern to an insulating body(10). The carrier is removed. A solder resist(20) is formed on the surface of the insulating body in order to cover a part of the first circuit pattern.
Abstract translation: 目的：提供印刷电路板及其制造方法，以通过将电路图案埋入绝缘体来改善电路图案的密度。 构成：在载体的表面上形成第一电路图案。 第二电路图案埋在衬底的两侧。 载体被压缩到基板，以便将第一电路图案埋入到绝缘体（10）中。 载体被移除。 为了覆盖第一电路图形的一部分，在绝缘体的表面上形成阻焊剂（20）。
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公开(公告)号：KR1020100125787A
公开(公告)日：2010-12-01
申请号：KR1020090044658
申请日：2009-05-21
Applicant: 삼성전기주식회사
Inventor： 박정현
IPC: H05K1/02
Abstract: PURPOSE: A PCB and a manufacturing method thereof are provided to transfer a large current without increasing the width of a circuit pattern by forming a solder pattern in the upper part of the circuit pattern. CONSTITUTION: An insulating layer is made of an electrical insulation material. A circuit pattern is formed on the insulating layer in order to transfer an electrical signal. A solder pattern(150) is formed on the circuit pattern. The circuit pattern is composed of a high current pattern. A solder resist layer(110) having an opening, capable of exposing the circuit pattern, is formed on the upper part of the insulating layer. The impedance of a pattern, which consists of a solder pattern on the circuit pattern, is less than the impedance of the circuit pattern itself.
Abstract translation: 目的：提供PCB及其制造方法，通过在电路图案的上部形成焊料图案，不会增加电路图案的宽度而传递大电流。 构成：绝缘层由电绝缘材料制成。 在绝缘层上形成电路图案以便传送电信号。 在电路图案上形成焊料图案（150）。 电路图案由高电流图案组成。 在绝缘层的上部形成具有能够露出电路图形的开口的阻焊层（110）。 由电路图案上的焊料图案组成的图案的阻抗小于电路图案本身的阻抗。
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公开(公告)号：KR1020100116472A
公开(公告)日：2010-11-01
申请号：KR1020090035208
申请日：2009-04-22
Applicant: 삼성전기주식회사
Inventor： 박정현
IPC: H05B41/285
CPC classification number: Y02B20/183 , H05B41/2851 , G02F1/1336 , H05B41/2824 , H05B41/2856
Abstract: PURPOSE: A protection circuit of an inverter is provided to reduce manufacturing costs by easily implementing the device in a single side PCB(Printed Circuit Board). CONSTITUTION: An inverter protection circuit comprises a first resistor(R1), a diode(D1), and a pull-up voltage setting section(400). The first resistor is connected between an output terminal and a ground terminal. The anode of the diode is connected to the output terminal of a transformer. A pull-up voltage setting unit is connected to the cathode of the diode. The pull-up voltage setting unit establishes the pull-up voltage at a node(20). The node is connected to an external power through a pull-up resistor. When the diode is turned off, the node outputs high level signal.
Abstract translation: 目的：提供逆变器的保护电路，通过在单面PCB（印刷电路板）中轻松实现设备来降低制造成本。 构成：逆变器保护电路包括第一电阻器（R1），二极管（D1）和上拉电压设定部分（400）。 第一个电阻连接在输出端子和接地端子之间。 二极管的阳极连接到变压器的输出端。 上拉电压设定单元连接到二极管的阴极。 上拉电压设定单元在节点（20）处建立上拉电压。 节点通过上拉电阻连接到外部电源。 当二极管关断时，节点输出高电平信号。
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公开(公告)号：KR1020100062361A
公开(公告)日：2010-06-10
申请号：KR1020080120966
申请日：2008-12-02
Applicant: 삼성전기주식회사
CPC classification number: B32B37/02 , B32B2457/08 , C25D5/022 , H05K3/205 , H05K3/428 , H05K3/4658 , H05K2201/0376 , H05K2203/0384
Abstract: PURPOSE: A method for manufacturing a printed circuit board is provided to miniaturize a product by increasing the density of wiring patterns. CONSTITUTION: A circuit pattern is formed on one side of a carrier(S110). One side of the carrier is compressed to one side of an insulator(S120). The carrier is removed(S130). One end of the circuit pattern is processed to form a hole which passes through the insulator(S140). A conductive material fills the inside the hole to corresponds to a via.
Abstract translation: 目的：提供印刷电路板的制造方法，通过增加布线图案的密度来使产品小型化。 构成：在载体的一侧形成电路图案（S110）。 载体的一侧被压缩到绝缘体的一侧（S120）。 移除载体（S130）。 处理电路图案的一端以形成穿过绝缘体的孔（S140）。 导电材料填充孔的内部以对应于通孔。
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公开(公告)号：KR1020100053983A
公开(公告)日：2010-05-24
申请号：KR1020080112892
申请日：2008-11-13
Applicant: 삼성전기주식회사
IPC: H05K1/02
CPC classification number: H05K3/007 , H05K1/115 , H05K1/187 , H05K3/3452 , H05K3/429
Abstract: PURPOSE: A carrier member and a PCB manufacturing method thereof are provided to remove a thermosetting resin layer without a separate additional process by removing a thermosetting resin layer during a first desmear process. CONSTITUTION: A seed layer and a wiring pattern are formed on a thermosetting resin layer of a carrier member. The wiring pattern is transcribed in both sides of a core insulating layer by pressurizing the carrier member in both sides of the core insulating layer(110). A metal base part of the carrier member is removed. A via hole is formed in order to interlink the wiring pattern interval. The thermosetting resin layer of the carrier member is removed during a first desmear process. A copper-electroplated layer is formed inside the via hole. A seed layer is removed.
Abstract translation: 目的：提供载体构件和PCB制造方法，以在第一去污工艺中除去热固性树脂层，而不用单独的附加工艺去除热固性树脂层。 构成：在承载构件的热固性树脂层上形成种子层和布线图案。 通过对芯绝缘层（110）的两侧的载体构件进行加压，将布线图案转印到芯绝缘层的两侧。 移除载体构件的金属底座部分。 形成通孔以使布线图案间隔互相连接。 在第一次去污处理期间移除载体构件的热固性树脂层。 在通孔内部形成铜电镀层。 种子层被去除。
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