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公开(公告)号：KR1020100008883A
公开(公告)日：2010-01-27
申请号：KR1020080069493
申请日：2008-07-17
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/144 , H01L45/1625 , H01L45/1683 , G11C13/0004 , H01L45/143
Abstract: PURPOSE: A phase change memory device and a manufacturing method thereof are provided to reduce the power consumption of the phase change memory device by arranging an auxiliary area made of different phase change material around a main operating area made of a phase change material. CONSTITUTION: A first electrode layer(110) is formed on the top of a substrate. A heat emitting electrode layer(120) is formed on the first electrode layer. An insulating layer(130) is formed on the heat emitting electrode layer, and has a pore(150) exposing a part of the heat emitting electrode layer. A phase change material layer(200) is formed to fill in the pore and contact a part of the heat emitting electrode layer. A second electrode layer is formed on the top of the phase change material layer.
Abstract translation: 目的：提供一种相变存储器件及其制造方法，通过在由相变材料制成的主操作区域周围布置由不同的相变材料制成的辅助区域来减少相变存储器件的功耗。 构成：在基板的顶部上形成第一电极层（110）。 在第一电极层上形成发热电极层（120）。 绝缘层（130）形成在发热电极层上，并且具有暴露一部分发热电极层的孔（150）。 形成相变材料层（200）以填充孔并接触发热电极层的一部分。 第二电极层形成在相变材料层的顶部。
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公开(公告)号：KR1020090060935A
公开(公告)日：2009-06-15
申请号：KR1020080084534
申请日：2008-08-28
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , C23C16/305 , H01L45/143 , H01L45/144
Abstract: An electronic device using a phase change material, a phase change memory device, and a manufacturing method thereof are provided to make a programmable volume small by generating a phase change layer using a solid state reaction method. An insulation layer covers a first reaction layer in order to form a contact hole which exposes a part of a top part of the first reaction layer(208). A second reaction layer(210) is filled in the contact hole. A phase change layer(215) is formed between the first reaction layer and the second reaction layer. The phase change layer is formed by a solid state reaction of material used in the first reaction layer and material used in the second reaction layer. The phase change layer is made of material which is changed into an amorphous state and a crystalline state according to a current amount.
Abstract translation: 提供了使用相变材料的电子设备，相变存储器件及其制造方法，通过使用固态反应方法生成相变层来使可编程体积小。 绝缘层覆盖第一反应层以形成暴露第一反应层（208）顶部的一部分的接触孔。 第二反应层（210）填充在接触孔中。 在第一反应层和第二反应层之间形成相变层（215）。 相变层通过第一反应层中使用的材料和第二反应层中使用的材料的固态反应形成。 相变层由根据电流量变为非晶状态和结晶状态的材料制成。
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公开(公告)号：KR100889743B1
公开(公告)日：2009-03-24
申请号：KR1020060124118
申请日：2006-12-07
Applicant: 한국전자통신연구원
IPC: H01L27/115
CPC classification number: H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1666
Abstract: 본 발명에 따른 상변화 메모리는 반도체 기판 위의 게이트 전극 및 상기 게이트 전극 양 옆으로 상기 반도체 기판에 형성된 제1 및 제2 불순물 영역을 포함하는 트랜지스터; 상기 제1 불순물 영역과 전기적으로 연결되는 비트라인; 및 상기 제2 불순물 영역과 전기적으로 연결되는 상변화 저항소자를 포함하되, 상기 상변화 저항소자는 도핑된 SiGe 층으로 형성된 하부 전극; 상기 하부 전극과 접촉하는 상변화층; 및 상기 상변화층과 연결된 상부 전극을 포함한다.
하부 전극으로 비저항이 높고, 열전도도가 낮은 도핑된 SiGe 를 채용함으로써 리셋 전류를 줄일 수 있고, 상변화 메모리 전체의 전력 소모를 줄일 수 있다.
상변화 메모리, 리셋 전류, 하부 전극, SiGe-
公开(公告)号：KR100833505B1
公开(公告)日：2008-05-29
申请号：KR1020060122600
申请日：2006-12-05
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1666 , H01L45/1691
Abstract: A phase change memory device which has a small contact between a phase change layer and a heating electrode, and a manufacturing method thereof are provided to decrease contact size and reset current by forming the heating electrode which has an upper end shorter than a lower end. The plural lower part electrodes(102a,102b) are formed on a semiconductor substrate(100). The plural heating electrodes(112a,112b) which have lower ends of shorter length than upper ends are formed on the lower electrodes. The plural phase change layers(114a,114b) are formed adjacent to the upper end of the heating electrode. The plural upper part electrodes(124a,124b) are formed on the phase change layers.
Abstract translation: 提供了相变层和加热电极之间具有小接触的相变存储器件及其制造方法，其通过形成上端短于下端的加热电极来减小接触尺寸和复位电流。 多个下部电极（102a，102b）形成在半导体衬底（100）上。 在下部电极上形成多个长度比上端短的端部的加热电极（112a，112b）。 多个相变层（114a，114b）与加热电极的上端相邻地形成。 在相变层上形成多个上部电极（124a，124b）。
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公开(公告)号：KR100825767B1
公开(公告)日：2008-04-29
申请号：KR1020070043800
申请日：2007-05-04
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , G11C13/0004 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: A PRAM(Phase change RAM) device and a method for manufacturing the same are provided to enhance reliability by using a heat-radiating layer having an optimum heat-radiating characteristic. A PRAM device comprises a lower electrode(110) formed on a semiconductor substrate, an upper electrode(150) formed on the lower electrode, and a PRAM layer formed between the lower electrode and the upper electrode. A heat-radiating layer(120) is formed between the upper electrode or the lower electrode and the PRAM. The heat-radiating layer includes a first heat-radiating layer(121) and a second heat-radiating layer(122). The first heat-radiating layer comes in contact with the PRAM layer. The second heat-radiating layer comes in contact with the first heat-radiating layer and is positioned between the first heat-radiating layer and the upper electrode or the lower electrode.
Abstract translation: 提供PRAM（相变RAM）装置及其制造方法，以通过使用具有最佳散热特性的散热层来提高可靠性。 PRAM器件包括形成在半导体衬底上的下电极（110），形成在下电极上的上电极（150）和形成在下电极和上电极之间的PRAM层。 在上电极或下电极与PRAM之间形成散热层（120）。 散热层包括第一散热层（121）和第二散热层（122）。 第一散热层与PRAM层接触。 第二散热层与第一散热层接触并位于第一散热层与上电极或下电极之间。
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Patent Agency Ranking
公开(公告)号：KR100785807B1
公开(公告)日：2007-12-13
申请号：KR1020060122550
申请日：2006-12-05
Applicant: 한국전자통신연구원
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: A method of fabricating a phase change memory device for obtaining high integration without a gap fill process is provided to reduce a manufacturing cost by reducing the number of processes without increasing the gap-fill process. A lower electrode(102) is formed on an upper surface of a semiconductor substrate(100). A heating electrode(104) is formed on an upper surface of the lower electrode. An intermediate insulating layer higher than a top part of the heating electrode is formed on a front surface of the semiconductor substrate having the lower electrode and the heating electrode. A buried insulating layer(106a) is formed by planarizing the interlayer dielectric in order to expose the heating electrode. A phase change layer(108) is formed on the heating electrode. An upper electrode(116) is formed on the phase change layer.
Abstract translation: 提供一种制造用于在没有间隙填充处理的情况下获得高集成度的相变存储器件的方法，以通过在不增加间隙填充处理的情况下减少工艺数量来降低制造成本。 在半导体衬底（100）的上表面上形成下电极（102）。 在下电极的上表面上形成加热电极（104）。 在具有下电极和加热电极的半导体衬底的前表面上形成高于加热电极顶部的中间绝缘层。 通过使层间电介质平坦化以使加热电极露出而形成掩埋绝缘层（106a）。 在加热电极上形成相变层（108）。 上电极（116）形成在相变层上。
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公开(公告)号：KR100753842B1
公开(公告)日：2007-08-31
申请号：KR1020060085826
申请日：2006-09-06
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
Abstract: 상변화 메모리 소자를 제공한다. 본 발명은 상변화층 패턴을 포함하는 상변화 메모리부와, 상기 상변화 메모리부의 상변화층 패턴에 레이저빔을 국부적으로 집속하는 레이저빔 집속부와, 상기 레이저빔을 발생시켜 상기 레이저빔 집속부로 상기 레이저빔을 방출하는 반도체 레이저부를 포함하여 이루어진다. 이에 따라, 본 발명의 상변화 메모리 소자는 셋 및 리셋 동작시 국부적으로 인가되는 레이저빔을 이용하기 때문에, 소비 전력을 줄이면서도 단위 셀의 동작시에 발생한 열이 인접 셀에 영향을 주어 인접 메모리 셀에 저장된 정보를 파괴하거나 변경시키지 않는다.
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公开(公告)号：KR100723839B1
公开(公告)日：2007-05-31
申请号：KR1020050081314
申请日：2005-09-01
Applicant: 한국전자통신연구원
IPC: H01L27/10
Abstract: 저소비전력형 상변화 메모리소자의 제작을 위한 발열성 관통전극 구조를 포함하는 상변화 메모리소자 및 그 제조방법을 제공한다. 그 소자 및 방법은 소정의 영역을 관통한 관통전극 구조를 내재한 제1 상변화 박막층과, 관통전극 구조에 매립된 발열성 금속전극을 포함한다. 발열성 금속전극에 의해 가해진 열에너지에 의해 결정상태가 변화하고, 변화된 영역이 상기 제1 상변화 박막층에 제한된다.
상변화 메모리소자, 관통전극 구조, 상변화 박막층-
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公开(公告)号：KR1020070014837A
公开(公告)日：2007-02-01
申请号：KR1020050069803
申请日：2005-07-29
Applicant: 한국전자통신연구원
IPC: H01L27/115
CPC classification number: H01L45/06 , G11C13/0004 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1683
Abstract: A phase change memory device is provided to maximize the contact area between a phase change material layer and a heat generating electrode by including a phase change material layer at least one surface of which is surrounded by a heat generating electrode covering at least one sidewall of a pore. At least one surface of a lower electrode(102) is covered with an insulation layer(104) in which a pore for exposing a part of the one surface of the lower electrode is formed. At least one side surface of the insulation layer exposed by the pore and a part of the one surface of the lower electrode are covered with a heat generating electrode(110) including a recessed region. A phase change material layer(112) is formed on the heat generating electrode, burying the recessed region. An upper electrode is formed on the phase change material layer. The heat generating electrode surrounds at least one surface of the phase change material layer, having a uniform thickness.
Abstract translation: 提供了一种相变存储器件，用于通过包括相变材料层来最大化相变材料层和发热电极之间的接触面积，所述相变材料层的至少一个表面由覆盖至少一个侧壁的发热电极包围 孔。 下电极（102）的至少一个表面被绝缘层（104）覆盖，其中形成用于暴露下电极的一个表面的一部分的孔。 由孔隙露出的绝缘层的至少一个侧表面和下电极的一个表面的一部分被包括凹陷区域的发热电极（110）覆盖。 在发热电极上形成相变材料层（112），埋入凹部。 在相变材料层上形成上电极。 发热电极围绕相变材料层的至少一个表面，具有均匀的厚度。
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