公开(公告)号：DE102005008476A1

公开(公告)日：2006-09-14

申请号：DE102005008476

申请日：2005-02-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  PAMLER WERNER ,  ENGELHARDT MANFRED

IPC: H01L23/522 ,  H01L21/768 ,  H01L27/108

Abstract: An interconnect arrangement and fabrication method are described. The interconnect arrangement includes an electrically conductive mount substrate, a dielectric layer formed on the mount substrate, and an electrically conductive interconnect formed on the dielectric layer. At least a portion of the dielectric layer under the interconnect contains a cavity. To fabricate the interconnect arrangement, a sacrificial layer is formed on the mount substrate and the interconnect layer is formed on the sacrificial layer. The interconnect layer and the sacrificial layer are structured to produce a structured interconnect on the structured sacrificial layer. A porous dielectric layer is formed on a surface of the mount substrate and of the structured interconnect as well as the sacrificial layer. The sacrificial layer is then removed to form the cavity under the interconnect.

公开(公告)号：DE10351230B3

公开(公告)日：2005-03-10

申请号：DE10351230

申请日：2003-11-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED ,  STEINLESBERGER GERNOT ,  UNGER EUGEN

IPC: B01J23/745 ,  B01J23/755 ,  B01J37/03 ,  C01B31/02 ,  C23C18/16 ,  C23C18/31 ,  B82B3/00 ,  B01J23/74

Abstract: The selective and surface deposition of a catalyst for growing nanotubes on a strip conductor in an integrated circuit comprises preparing an acidic or alkaline aqueous solution of the catalyst, applying the solution on the strip conductor, and removing the excess solution.

公开(公告)号：DE10323905A1

公开(公告)日：2005-01-05

申请号：DE10323905

申请日：2003-05-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STEINLESBERGER GERNOT ,  ENGELHARDT MANFRED ,  UNGER EUGEN

IPC: C23C18/31 ,  C23C28/02 ,  H01L21/288 ,  C25D3/38 ,  C25D7/12

公开(公告)号：DE10213546C1

公开(公告)日：2003-11-20

申请号：DE10213546

申请日：2002-03-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED

IPC: H01L21/768 ,  H01L25/065 ,  H01L23/522

Abstract: Semiconductor device comprises a first substrate (101) with an integrated component (102), a second substrate (103) with an integrated repeater (104), a coupling layer (105) arranged between the substrates, and a contacting element (106) for electrically coupling the component to the repeater. An Independent claim is also included for a process for the production of the semiconductor device.

公开(公告)号：DE10125019A1

公开(公告)日：2002-12-05

申请号：DE10125019

申请日：2001-05-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PAMLER WERNER ,  ENGELHARDT MANFRED ,  GABRIC ZVONIMIR

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/314

Abstract: The invention relates to a hollow structure (100) in an integrated circuit, comprising a substrate (101) having a surface (102), conductor tracks (103) which are adjacently arranged on said surface in such a way that they form intermediate spaces (104) thereinbetween, a first layer (105) consisting of a first insulation material which is arranged over each conductor track (103), and a second layer (106) covering the intermediate spaces (104), consisting of a second insulation material which is deposited only on the first insulation material.

公开(公告)号：DE10121495A1

公开(公告)日：2002-11-14

申请号：DE10121495

申请日：2001-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED ,  SCHINDLER GUENTHER

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: Conductor strip arrangement comprises a first layer (101) made from a first insulating material; a conductor strip (104) arranged on the first layer and made from an electrically conducting material; and a second layer (107) arranged on the exposed strip conductor surface. The second layer encloses the conductor strip on the exposed strip conductor surface and is made from a second material which is harder than the first material. An Independent claim is also included for a process for the production of an encapsulated conductor strip. Preferred Features: An intermediate layer is arranged between the first layer and the conductor strip. The intermediate layer is made from a third material which is harder than the first material. The first insulating material is made from silicon dioxide or borophosphosilicate glass. The second material is made from an organic material.

公开(公告)号：DE10110468A1

公开(公告)日：2002-09-19

申请号：DE10110468

申请日：2001-03-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED

IPC: G02B5/20 ,  G02B6/293

Abstract: A filter element for filtering at least one wavelength zone from radiation incident on the filter element, and having a number of nanotubes in which by means of the selected length of the nanotubes the filtering characteristics of the filter element can be adjusted. An Independent claim covering a filtering system is also given.

公开(公告)号：DE10109877A1

公开(公告)日：2002-09-19

申请号：DE10109877

申请日：2001-03-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  ENGELHARDT MANFRED

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A conductor track arrangement (100) comprises, on a first layer (101), a first layer surface (102) and at least two conductor tracks (104), which are arranged on the first layer surface and which have a second layer surface (105) that is essentially parallel to the first layer surface (102). A second layer (106) is arranged on the second layer surface of each conductor track (104), whereby the second layers (106) of adjacent conductor tracks overlap areas located between the adjacent conductor tracks (104). A third layer (107) is arranged on said second layer and completely occludes the areas located between the adjacent conductor tracks (104) by overlapping the same.

公开(公告)号：DE19525072C2

公开(公告)日：2002-06-27

申请号：DE19525072

申请日：1995-07-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LAU FRANK ,  KRAUTSCHNEIDER WOLFGANG ,  ENGELHARDT MANFRED

IPC: H01L21/76 ,  H01L21/308 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/088 ,  H01L27/108 ,  H01L27/112

Abstract: PCT No. PCT/DE96/01109 Sec. 371 Date Jan. 6, 1998 Sec. 102(e) Date Jan. 6, 1998 PCT Filed Jun. 24, 1996 PCT Pub. No. WO97/03463 PCT Pub. Date Jan. 30, 1997An integrated circuit arrangement having at least two components has in a substrate, an insulation structure (4', 5) between the components which covers at least one side of a trench (3) and is thicker at the bottom of the trench than at the neck of the trench. The components are in this case arranged in different planes on the substrate surface and on the trench bottom. The insulation structure effects vertical insulation between the components.

公开(公告)号：DE10048420A1

公开(公告)日：2002-04-18

申请号：DE10048420

申请日：2000-09-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WURM STEFAN ,  ENGELHARDT MANFRED

IPC: H01L21/288 ,  H01L21/768 ,  H01L43/12 ,  H01L27/22 ,  H01F10/08

Abstract: The method involves applying a non-conducting mask layer (16) to a conducting layer (14) on a substrate layer (12), removing an area of the mask layer, depositing at least one conducting layer (52-56) onto the exposed area and converting all or part of the last deposited conducting layer to an electrically non-conducting layer (60) in an oxidation step. Independent claims are also included for the following: a circuit with substrate, contact and mask layer and a tunnel contact element.