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公开(公告)号：KR101198107B1
公开(公告)日：2012-11-12
申请号：KR1020097011467
申请日：2007-11-30
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: C23C16/26 , H01L21/31 , H01L21/768 , H01L23/522
CPC classification number: H01L23/5329 , C23C16/26 , H01L21/0276 , H01L21/31144 , H01L21/3146 , H01L21/76811 , H01L21/76834 , H01L21/76835 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: 본 발명은 비유전율을 낮게 억제하면서도 탄성율이 높고, 또한 열수축률이 작은 비결정 탄소막 및 그 막을 구비한 반도체 장치, 그리고 비결정 탄소막을 성막하는 기술을 제공한다. 성막 시에 Si(실리콘)의 첨가량을 제어하면서 비결정 탄소막을 성막한다. 이 때문에, 비유전율을 3.3 이하의 낮은 값으로 억제하면서도 탄성율이 높고, 또한 열수축률이 작은 비결정 탄소막을 얻을 수 있다. 따라서 이 비결정 탄소막을 반도체 장치를 구성하는 막으로서 이용한 경우에 막 박리 등의 결함을 억제할 수 있다.
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Patent Agency Ranking
公开(公告)号：KR101152203B1
公开(公告)日：2012-06-15
申请号：KR1020090055994
申请日：2009-06-23
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: H01L21/3205 , H01L21/768 , H01L23/52
CPC classification number: H01L21/76834 , H01L21/02115 , H01L21/02167 , H01L21/02274 , H01L21/3146 , H01L21/3148
Abstract: The present invention relates to a manufacturing method for a semiconductor device, the method includes a process for forming an interlayer film on a substrate, a process for forming an opening in the interlayer, a process for forming a conductive layer which fills the opening, and a process for forming a cap film on the surface of the conductive layer. In the process for forming the cap film, a reduction process for the surface of the conductive layer and the forming of the film are performed simultaneously.
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公开(公告)号：KR100942179B1
公开(公告)日：2010-02-11
申请号：KR1020087005618
申请日：2007-03-27
Applicant: 도쿄엘렉트론가부시키가이샤
Inventor： 키쿠치요시유키
IPC: H01L21/768 , H01L23/522 , H01L21/314
CPC classification number: H01L21/0217 , C23C16/345 , C23C16/36 , H01L21/0212 , H01L21/02126 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/3127 , H01L21/3185 , H01L21/76811 , H01L21/76832 , H01L23/53228 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: 본 발명은, 기판과, 상기 기판 상에 형성된, 불소 첨가 카본막으로 이루어지는 절연막과, 상기 절연막 상에 형성된, 질화 실리콘막과 실리콘, 탄소 및 질소를 포함하는 막으로 이루어지는 배리어층과, 상기 배리어층 상에 형성된, 실리콘과 산소를 포함하는 막을 갖는 하드 마스크층을 구비하고, 상기 배리어층은, 질화 실리콘막과, 실리콘, 탄소 및 질소를 포함하는 막이 아래로부터 당해 순서로 적층되어 형성되고 있어, 불소 첨가 카본막 중의 불소가 하드 마스크층으로 이동하는 것을 억제하도록 기능하는 것을 특징으로 하는 반도체 장치이다.
탄소, 실리콘, 불소 첨가 카본막, 하드 마스크층Abstract translation: 形成在绝缘膜上并包括氮化硅膜和含硅，碳和氮的膜的阻挡层;以及形成在阻挡膜上的阻挡层， 以及形成在所述基板上的具有包含硅和氧的膜的硬掩模层，其中所述阻挡层通过从底部依次堆叠氮化硅膜和包含硅，碳和氮的膜而形成， 并且用于抑制附加碳膜中的氟向硬掩模层的移动。
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公开(公告)号：KR1020080034503A
公开(公告)日：2008-04-21
申请号：KR1020087005618
申请日：2007-03-27
Applicant: 도쿄엘렉트론가부시키가이샤
Inventor： 키쿠치요시유키
IPC: H01L21/768 , H01L23/522 , H01L21/314
CPC classification number: H01L21/0217 , C23C16/345 , C23C16/36 , H01L21/0212 , H01L21/02126 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/3127 , H01L21/3185 , H01L21/76811 , H01L21/76832 , H01L23/53228 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Disclosed is a semiconductor device characterized by comprising a substrate, an insulating film which is formed on the substrate and composed of a fluorine-added carbon film, a barrier layer which is formed on the insulating film and composed of a silicon nitride film and a film containing silicon, carbon and nitrogen, and a hard mask layer which is formed on the barrier layer and composed of a film containing silicon and oxygen. This semiconductor device is also characterized in that the barrier layer is formed by arranging the silicon nitride film and the film containing silicon, carbon and nitrogen in this order from bottom to top, so that the barrier layer functions to suppress transfer of fluorine from the fluorine-added carbon film to the hard mask layer.
Abstract translation: 公开了一种半导体器件，其特征在于，包括：基板，形成在基板上并由添加氟的碳膜构成的绝缘膜，形成在绝缘膜上并由氮化硅膜和膜构成的阻挡层 含有硅，碳和氮的硬掩模层和形成在阻挡层上并由含有硅和氧的膜组成的硬掩模层。 该半导体器件的特征还在于，通过从底部到顶部依次排列氮化硅膜和含有硅，碳和氮的膜来形成阻挡层，使得阻挡层起到抑制氟从氟转移的作用 添加碳膜到硬掩模层。
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公开(公告)号：KR1020100011899A
公开(公告)日：2010-02-03
申请号：KR1020090055994
申请日：2009-06-23
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: H01L21/3205 , H01L21/768 , H01L23/52
CPC classification number: H01L21/76834 , H01L21/02115 , H01L21/02167 , H01L21/02274 , H01L21/3146 , H01L21/3148
Abstract: PURPOSE: A semiconductor device and a manufacturing method thereof are provided to improve reliability by preventing a metal element from being diffused to an intermediate layer arranged on a conductive layer. CONSTITUTION: An intermediate layer(20) is formed on a substrate(10). An opening is formed on the intermediate layer. A conductive layer(30) is formed on the opening. A cap film is formed on a surface of the conductive layer. When forming the cap film, the reduction process of the surface of the conductive layer and the film formation process are performed at the same.
Abstract translation: 目的：提供半导体器件及其制造方法，以通过防止金属元件扩散到布置在导电层上的中间层来提高可靠性。 构成：在基板（10）上形成中间层（20）。 在中间层上形成开口。 在开口上形成导电层（30）。 在导电层的表面上形成盖膜。 当形成盖膜时，导电层的表面的还原过程和成膜工艺也是这样进行的。
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公开(公告)号：KR1020090087466A
公开(公告)日：2009-08-17
申请号：KR1020097011467
申请日：2007-11-30
Applicant: 도쿄엘렉트론가부시키가이샤
IPC: C23C16/26 , H01L21/31 , H01L21/768 , H01L23/522
CPC classification number: H01L23/5329 , C23C16/26 , H01L21/0276 , H01L21/31144 , H01L21/3146 , H01L21/76811 , H01L21/76834 , H01L21/76835 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Provided are an amorphous carbon film having a high elasticity and a low thermal contraction ratio with a suppressed specific dielectric constant, a semiconductor device provided with the film and a technology for forming the amorphous carbon film. The amorphous carbon film is formed by controlling an additive amount of Si (silicon) during film formation. Thus, the amorphous carbon film having a high elasticity and a low thermal contraction ratio with a suppressed specific dielectric constant of 3.3 or less is obtained. Therefore, troubles such as film peeling can be suppressed when the amorphous carbon film is used as a film that configures a semiconductor device. ® KIPO & WIPO 2009
Abstract translation: 提供具有高弹性和具有抑制的介电常数的低热收缩率的非晶碳膜，设置有该膜的半导体器件和用于形成无定形碳膜的技术。 无定形碳膜通过在成膜期间控制Si（硅）的添加量而形成。 因此，具有高的弹性和低的热收缩率，具有抑制的比介电常数为3.3以下的无定形碳膜。 因此，当将非晶碳膜用作构成半导体器件的膜时，可以抑制诸如膜剥离的问题。 ®KIPO＆WIPO 2009
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