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公开(公告)号：KR1020170070711A
公开(公告)日：2017-06-22
申请号：KR1020150178559
申请日：2015-12-14
Applicant: 삼성전기주식회사
Abstract: 인쇄회로기판이개시된다. 본발명의일 측면에따른인쇄회로기판은, 도체패턴, 도체패턴의일면중 적어도일부에형성되고표면에홈이형성된보호층, 도체패턴과보호층상에형성되고홈을노출하는개구부(opening)가형성된솔더레지스트층, 및홈을커버하도록개구부에형성되는표면처리층을포함한다.
Abstract translation: 公开了一种印刷电路板。 形成根据本发明的电路板是一个开口（开口）的一个方面印刷在导电图案，所述导电图案和所述表面保护层槽的一个表面的至少一部分形成，其形成在所述导电图案和所述保护层以暴露所述沟槽 形成于其上的阻焊剂层以及形成在开口中以覆盖沟槽的表面处理层。
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公开(公告)号：KR101331705B1
公开(公告)日：2013-11-20
申请号：KR1020110059210
申请日：2011-06-17
Applicant: 삼성전기주식회사
Abstract: 본 발명은 인쇄 장치 및 이를 이용한 반도체 패키지 기판 제조방법에 관한 것으로서, 인쇄용 드라이 필름이 형성된 기판을 상부에 배치시키는 인쇄용 테이블; 상기 기판에 범프를 인쇄하는 스퀴지; 및 상기 기판에 접촉되는 일측에 기판 방향으로 기울어진 경사면을 갖고 상승 또는 하강 운동을 수행하는 제1 클램프 부재와 제2 클램프 부재로 구성된 한 쌍의 클램프 부재;를 포함하여, 상기 한 쌍의 클램프 부재 중 인쇄 시작 지점에 위치한 클램프 부재가 상기 기판 상면으로 상승하고, 인쇄 종료 지점에 위치한 클램프 부재가 상기 기판 하면으로 하강하는 것을 특징으로 한다.
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公开(公告)号：KR1020110015904A
公开(公告)日：2011-02-17
申请号：KR1020090073347
申请日：2009-08-10
Applicant: 삼성전기주식회사
CPC classification number: H01L2224/11 , H01L2924/00012
Abstract: PURPOSE: A method for manufacturing solder bumps is provided to secure a thickness required for forming the height of the solder bumps by stacking a plurality of dry films on a solder resist layer. CONSTITUTION: A solder resist layer(30) is formed on a substrate(S) with a conductive pad(P). A plurality of dry films(10, 20) is stacked on the solder resist layer. The thickness of the dry films is 40um or less. An opening is formed in the dry films in order to expose the conductive pad. Solder paste is applied to the exposed conductive pad. A reflow operation with respect to the solder paste is implemented to form solder bumps.
Abstract translation: 目的：提供一种用于制造焊料凸块的方法，以通过在阻焊剂层上堆叠多个干膜来确保形成焊料凸块的高度所需的厚度。 构成：在具有导电焊盘（P）的基板（S）上形成阻焊层（30）。 多个干膜（10,20）堆叠在阻焊层上。 干膜的厚度为40um以下。 在干膜中形成开口以暴露导电垫。 将焊膏施加到暴露的导电焊盘。 实现关于焊膏的回流操作以形成焊料凸块。
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公开(公告)号：KR1020090124662A
公开(公告)日：2009-12-03
申请号：KR1020080051003
申请日：2008-05-30
Applicant: 삼성전기주식회사
CPC classification number: H01L23/373 , B82Y30/00 , C04B35/80 , C04B2235/3217 , C04B2235/3418 , C04B2235/407 , C04B2235/408 , C04B2235/5288 , F28F3/02 , F28F21/02 , H01L24/48 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/15311 , H01L2924/1815 , H01L2924/3025 , Y10T29/49002 , Y10T29/4935 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: PURPOSE: A cooling fin and package substrate comprising the cooling fin and fabricating method of the same are provided to form sintered body including the carbon component. CONSTITUTION: The heat radiation fin(100a) is formed into the plastic object including the carbon component. The plastic object comprises the carbon nanotube or the carbon nanofiber and minute metal. The mold has the resin layer in which the heat radiation fin for manufacture groove is formed in one side of supporter. One side of the mold includes the carbon component. The supporter is eliminated and the radiating unit is formed. The heat radiation fin has the cover structure so that the surface of the printed circuit board in which the semiconductor chip is mounted be sealed up.
Abstract translation: 目的：提供包括冷却翅片的冷却翅片和封装基板及其制造方法，以形成包括碳组分的烧结体。 构成：散热片（100a）形成为包含碳成分的塑料体。 该塑料物体包括碳纳米管或碳纳米纤维和微量金属。 模具具有用于制造槽的散热片形成在支撑体一侧的树脂层。 模具的一侧包括碳组分。 消除支撑物并形成辐射单元。 散热片具有盖结构，使得安装有半导体芯片的印刷电路板的表面被密封。
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公开(公告)号：KR1020090087192A
公开(公告)日：2009-08-17
申请号：KR1020080012490
申请日：2008-02-12
Applicant: 삼성전기주식회사
IPC: H05K3/40
CPC classification number: H05K3/4007 , H05K3/0026 , H05K3/0041 , H05K3/3457
Abstract: A manufacturing method of a PCB is provided to reduce a lead time of a process by removing a solder resist printing process, a plating process, and a drill process. A first circuit pattern(12) is formed in one surface of a first resin layer(10). A conductive bump(14) is formed in one surface of the first resin layer. The conductive bump is electrically connected to the first circuit pattern. An insulation material(15) is laminated on the first resin layer. A second resin layer(20) is laminated on the insulation material. A second circuit pattern(22) is formed on one surface of the second resin layer. The second circuit pattern is electrically connected to the first circuit pattern by the conductive bump. An opening part is formed by etching a part of at least one of the first resin layer and the second resin layer. A solder bump is formed in the opening part.
Abstract translation: 提供PCB的制造方法，通过去除阻焊剂印刷工艺，电镀工艺和钻孔工艺来减少工艺的提前期。 第一电路图案（12）形成在第一树脂层（10）的一个表面中。 在第一树脂层的一个表面上形成导电凸块（14）。 导电凸块电连接到第一电路图案。 绝缘材料（15）层叠在第一树脂层上。 第二树脂层（20）层压在绝缘材料上。 在第二树脂层的一个表面上形成第二电路图案（22）。 第二电路图案通过导电凸块电连接到第一电路图案。 通过蚀刻第一树脂层和第二树脂层中的至少一个的一部分来形成开口部。 在开口部形成有焊料凸块。
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Patent Agency Ranking
公开(公告)号：KR1020090025468A
公开(公告)日：2009-03-11
申请号：KR1020070090345
申请日：2007-09-06
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K3/4691 , H05K3/4007 , H05K3/421 , H05K2201/09509
Abstract: A method for manufacturing rigid-flexible printed circuit board is provided to improve the degree of freedom and productivity of the circuit design. The conductive bump(600) is formed on the first flexible substrate(300). The thermosetting insulating layer(700) is laminated onto the rigid region of the first flexible substrate. The second flexible substrate is laminated onto the thermosetting insulating layer and is compressed. The first circuit pattern(302) is formed in the first flexible substrate. The second circuit pattern is formed in the second flexible substrate.
Abstract translation: 提供了一种用于制造刚性 - 柔性印刷电路板的方法，以提高电路设计的自由度和生产率。 导电凸块（600）形成在第一柔性基板（300）上。 热固性绝缘层（700）层压在第一柔性基板的刚性区域上。 将第二柔性基板层压到热固性绝缘层上并被压缩。 第一电路图案（302）形成在第一柔性基板中。 第二电路图案形成在第二柔性基板中。
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公开(公告)号：KR100871034B1
公开(公告)日：2008-11-27
申请号：KR1020070057370
申请日：2007-06-12
Applicant: 삼성전기주식회사
IPC: H05K3/40
CPC classification number: H05K3/4069 , H05K3/4614 , H05K3/4647 , H05K2201/0355 , H05K2203/0139 , H05K2203/0278 , H05K2203/1476 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49147 , Y10T29/49155 , Y10T29/49222 , Y10T29/53243
Abstract: A method for forming a paste bump of a PCB(Printed Circuit Board) is provided to reduce its fabrication coast and processing time by decreasing the number of printing when forming a paste bump on the PCB. A plate is prepared, and a first paste bump is formed on the plate after printing a conductive paste by using a first mask in which a hole of a first size is formed(S10,S20). The surface of the first paste bump is flattened through a coining process(S30). A second mask has a hole of a second size lower smaller than the hole of the first size and has a height lower than that of the first mask. A second paste bump is formed by being dried after printing a conductive paste on the first paste bump by using the second mask(S40,S50).
Abstract translation: 提供了一种用于形成PCB（印刷电路板）的糊状凸块的方法，通过在PCB上形成糊状凸块时减少打印次数来减少其制造惯性和加工时间。 制备板，并且通过使用其中形成有第一尺寸的孔的第一掩模印刷导电浆料之后，在板上形成第一膏状凸块（S10，S20）。 通过压印处理使第一粘贴凸块的表面变平（S30）。 第二掩模具有比第一尺寸的孔小的第二尺寸的孔，并且具有低于第一掩模的高度的高度。 通过使用第二掩模在第一粘贴凸块上印刷导电膏以后干燥形成第二粘贴凸块（S40，S50）。
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公开(公告)号：KR100871030B1
公开(公告)日：2008-11-27
申请号：KR1020070054028
申请日：2007-06-01
Applicant: 삼성전기주식회사
CPC classification number: H05K3/30 , H05K1/167 , H05K3/4007 , H05K2201/0367 , H05K2203/0338
Abstract: A method for fabricating an embedded resistor printed circuit board is provided to increase the reliability of a PCB(Printed Circuit Board) by making a resistor values uniformly. An original plate on which first circuit pattern is formed over a first insulating layer(102) is prepared. A resistor of bump type is formed by printing a carbonate resistor paste on the first circuit pattern at which a resistor(106) among the first circuit pattern, and a second insulating layer is laminated on the resistor. A second circuit pattern electrically connected to the resistor is formed on the second insulating layer.
Abstract translation: 提供了一种用于制造嵌入式电阻器印刷电路板的方法，以通过均匀地形成电阻值来增加PCB（印刷电路板）的可靠性。 准备在第一绝缘层（102）上形成有第一电路图案的原版。 通过在第一电路图案上印刷碳酸盐电阻浆料，形成第一电路图案和第二绝缘层之间的电阻器（106）上的凸块型电阻器。 电连接到电阻器的第二电路图案形成在第二绝缘层上。
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公开(公告)号：KR100832650B1
公开(公告)日：2008-05-27
申请号：KR1020070057711
申请日：2007-06-13
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K3/462 , H05K3/4069 , H05K3/4602 , H05K3/4647 , H05K2201/09509 , H05K2201/0959 , H05K2201/096
Abstract: A multi layer printed circuit board and a method of fabricating the same are provided to improve adhesion reliability between a paste bump and a circuit pattern through increase of a contact area therebetween by surrounding and filling up the circuit pattern with the paste bump. A multi layer printed circuit board includes a first substrate and a second substrate, a fourth insulating layer, and a paste bump(40). The first substrate includes first inner layer circuit patterns(16) on both surfaces of a first insulating layer(12), a second insulating layer(14) with second inner layer circuit patterns(18) on the both surfaces of the first insulating layer, and a first via hole passing through the first and second insulating layers. The second substrate includes third inner layer circuit patterns(36), outer layer circuit patterns(52), and a second via hole(50). The third inner layer circuit patterns are formed on positions of one surface of a third insulating layer(32) which face a part of the second inner layer circuit patterns. The outer layer circuit patterns are formed on the other surface of the third insulating layer. The second via hole electrically connects the third inner layer circuit pattern and the outer layer circuit pattern. The fourth insulation layer is built-up between the first and second substrates. The paste bump surrounds and fills up the third inner layer circuit patterns and is connected to the second inner layer circuit patterns by passing through the fourth insulating layer.
Abstract translation: 提供了一种多层印刷电路板及其制造方法，以通过通过用糊状凸块包围和填充电路图案来增加其间的接触面积来提高糊状凸块与电路图案之间的粘附可靠性。 多层印刷电路板包括第一基板和第二基板，第四绝缘层和粘贴凸块（40）。 第一衬底包括在第一绝缘层（12）的两个表面上的第一内层电路图案（16），在第一绝缘层的两个表面上具有第二内层电路图案（18）的第二绝缘层（14） 以及穿过第一和第二绝缘层的第一通孔。 第二基板包括第三内层电路图案（36），外层电路图案（52）和第二通孔（50）。 第三内层电路图案形成在与第二内层电路图案的一部分相对的第三绝缘层（32）的一个表面的位置上。 外层电路图案形成在第三绝缘层的另一个表面上。 第二通孔电连接第三内层电路图案和外层电路图案。 在第一和第二基板之间建立第四绝缘层。 粘贴凸块围绕并填充第三内层电路图案，并通过穿过第四绝缘层与第二内层电路图案连接。
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公开(公告)号：KR100811034B1
公开(公告)日：2008-03-06
申请号：KR1020070041983
申请日：2007-04-30
Applicant: 삼성전기주식회사
IPC: H05K3/30
CPC classification number: H01L23/5389 , H01L24/19 , H01L24/24 , H01L2224/04105 , H01L2224/20 , H01L2224/24227 , H01L2224/73267 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/19041 , H05K1/188 , H05K3/4069 , H05K3/4647 , H05K3/4652 , H05K2201/0187 , H05K2201/0355 , H05K2201/10674 , H05K2203/1469 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49146 , Y10T29/49147 , Y10T29/49156 , Y10T29/49171 , Y10T29/49176
Abstract: A method for manufacturing a printed circuit board having embedded electronic components is provided to implement electronic components requiring rapid operation by reducing the board area and realizing high density of the electronic components. A method for manufacturing a printed circuit board having embedded electronic components includes the steps of: forming a connection bump and an electrode bump on a side of a base substrate(S100); receiving the electronic components so that the electrode bump and connection terminals of the electronic components correspond to each other(S200); stacking an insulating layer with an opening unit corresponding to the electronic component so that the connection bump passes through the side of the base substrate(S400); filling a filler material in the aperture unit(S500); and stacking a metal layer on the insulating layer(S600).
Abstract translation: 提供一种具有嵌入式电子部件的印刷电路板的制造方法，通过减少电路板面积和实现电子部件的高密度化来实现需要快速动作的电子部件。 一种具有嵌入式电子部件的印刷电路板的制造方法，其特征在于，在基板侧形成连接凸块和电极凸块（S100）。 接收电子部件，使得电子部件的电极凸块和连接端子彼此对应（S200）。 堆叠具有对应于电子部件的开口单元的绝缘层，使得连接凸块穿过基底基板的侧面（S400）; 在孔单元中填充填料（S500）; 并在绝缘层上层叠金属层（S600）。
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