公开(公告)号：KR1020110047756A

公开(公告)日：2011-05-09

申请号：KR1020090104504

申请日：2009-10-30

Applicant: 삼성전자주식회사

Inventor： 장일용 ,  김훈 ,  이혜경 ,  우상균 ,  남동석

IPC: G03F1/32 ,  G03F1/26 ,  H01L21/027

CPC classification number: G03F1/26 ,  G03F1/32 ,  G03F1/0046

Abstract: PURPOSE: A half-tone phase shift blank photo-mask, a half-tone phase shift photo-mask, methods for fabricating the same are provided to obtain 180 degrees of a phase shift difference and reduce the thickness of a resist functioning as a mask. CONSTITUTION: A half-tone phase shift photo-mask(100) includes a transparent substrate(110), shift patterns(124, 126), a light blocking pattern(142). The transparent substrate includes a transparent property with respect to exposing light. The shift patterns are formed on the transparent substrate. The shift patterns are divided into a pattern region and a blind region. The thickness of the blind region is thicker than that of the pattern region. The exposing light is phase shifted through the pattern region.

Abstract translation: 目的：提供半色调相移空白光掩模，半色调相移光掩模，其制造方法以获得180度的相移差，并减小用作掩模的抗蚀剂的厚度 。 构成：半色调相移光掩模（100）包括透明基板（110），移动图案（124,126），遮光图案（142）。 透明基板包括相对于曝光的透明性。 移位图案形成在透明基板上。 移位模式分为模式区域和盲区域。 盲区的厚度比图案区的厚度厚。 曝光光通过图案区域相移。

公开(公告)号：KR1020080065482A

公开(公告)日：2008-07-14

申请号：KR1020070002650

申请日：2007-01-09

Applicant: 삼성전자주식회사

Inventor： 안미혜 ,  남동석 ,  허성민

IPC: H01L21/027

CPC classification number: G03F1/38 ,  G03F1/144 ,  H01L21/32139

Abstract: A method for forming a sub-resolution assist pattern is provided to form clearly an assist pattern of 90nm or less by improving a manufacturing method without improving resolution of photoresist and using an additional exposure apparatus. A fusing pattern(120) including a main pattern, an assist pattern, and a residual region between the main and assist patterns is formed on a substrate(110). A mask is formed on the fusing pattern in order to open only the residual region. The residual region is removed by using the mask. In the process for removing the mask, a photoresist layer(130) is formed on the fusing pattern. The photoresist layer is exposed by using a pattern of the residual region. The photoresist layer corresponding to the residual region is removed.

Abstract translation: 提供了形成副分辨率辅助图案的方法，通过改进制造方法而不改善光致抗蚀剂的分辨率并使用另外的曝光装置来清楚地形成90nm以下的辅助图案。 在基板（110）上形成包括主图案，辅助图案和主辅助图案之间的残留区域的熔化图案（120）。 在熔合图案上形成掩模，以仅打开残留区域。 通过使用掩模去除残留区域。 在去除掩模的过程中，在熔化图案上形成光刻胶层（130）。 通过使用残留区域的图案来曝光光致抗蚀剂层。 去除与残留区域对应的光致抗蚀剂层。

公开(公告)号：KR100480583B1

公开(公告)日：2005-05-16

申请号：KR1019980009712

申请日：1998-03-20

Applicant: 삼성전자주식회사

Inventor： 남동석 ,  이중현

IPC: H01L21/28

Abstract: 본 발명은 비 콘택패턴과 자기정렬적 방법을 이용한 반도체 장치의 콘택형성방법에 관해 개시한다. 자기정렬적인 방법과 함께 콘택 패턴 마스크를 사용하는 대신 이에 비해 광의 회절 정도가 심하지 않은 라인 및 스페이스 패턴을 사용하여 원하는 물질층의 원하는 위치에 미세 콘택을 형성한다. 곧, 라인 및 스페이스 패턴에서 라인 패턴의 일부 영역 상에 절연막을 형성한 다음 이부분을 자기정렬적 마스크로 사용하고, 나머지 영역을 커버링하는 요철형 감광막 마스크 패턴을 사용하여 상기 자기정렬적 마스크와 상기 요철형 감광막 마스크 패턴으로 한정되는 하부 층간절연막에 미세 콘택홀을 형성한다. 이와 같이, 라인 및 스페이스 패턴을 마스크의 일부로 사용하는 자기정렬적 방법을 이용함으로써 콘택 패턴 형성에서 광의 회절에 의한 영향을 최소화하여 양호한 미세 콘택을 형성할 수 있다.

公开(公告)号：KR1020000073971A

公开(公告)日：2000-12-05

申请号：KR1019990017599

申请日：1999-05-17

Applicant: 삼성전자주식회사

Inventor： 류만형 ,  남동석

IPC: H01L21/027

Abstract: PURPOSE: A method for manufacturing a fine pattern using an acid treatment of photoresist is provided to form a contact hole having an opening size exceeding the limit of a wavelength in a lithography technique while using the temperature used in a conventional process. CONSTITUTION: A resist layer is formed by coating a resist composition on a semiconductor substrate(10). A lithography process is performed regarding the resist layer to form a photoresist pattern having an opening exposing the semiconductor substrate by the first width. An exposure process is performed regarding the photoresist pattern to generate an acid(50) within the photoresist pattern. A varied photoresist pattern(30c) exposing the semiconductor substrate by the second width wider than the first width is formed by supplying the acid to the photoresist pattern while performing a bake process to reflow the photoresist pattern. The varied photoresist pattern is cooled down to the normal temperature.

Abstract translation: 目的：提供使用光致抗蚀剂的酸处理来制造精细图案的方法，以在使用常规方法中使用的温度时形成具有超过光刻技术中的波长极限的开口尺寸的接触孔。 构成：通过在半导体衬底（10）上涂覆抗蚀剂组合物形成抗蚀剂层。 对抗蚀剂层进行光刻工艺以形成具有将半导体衬底暴露第一宽度的开口的光致抗蚀剂图案。 对光致抗蚀剂图案进行曝光处理以在光致抗蚀剂图案内产生酸（50）。 通过在进行烘烤处理以将光致抗蚀剂图案重新流动的同时向酸蚀剂图案供给酸而形成使半导体衬底暴露宽度大于第一宽度的第二宽度的变化的光刻胶图案（30c）。 将各种光致抗蚀剂图案冷却至常温。

公开(公告)号：KR1020110109563A

公开(公告)日：2011-10-06

申请号：KR1020100029349

申请日：2010-03-31

Applicant: 삼성전자주식회사

Inventor： 한학승 ,  남동석 ,  우상균

IPC: H01L21/027

CPC classification number: B82Y10/00 ,  B82Y40/00 ,  G03F1/24 ,  G03F1/36 ,  G03F1/74 ,  H01L21/0337 ,  G03F1/0092 ,  G03F1/144 ,  H01L21/0274

Abstract: 본 발명에 의한 포토 마스크의 광학 파라미터 보정 방법은 포토 마스크를 제공하고, 포토 마스크를 노광하여 에어리얼 이미지를 검출하여 포토 마스크를 평가하고, 평가 결과에 따라 포토 마스크에 가스 클러스터 이온빔을 조사하여 에어리얼 이미지와 관련된 포토 마스크의 광학 파라미터를 보정하는 것을 포함한다. 가스 클러스터 이온빔은 마스크 패턴이 형성된 포토 마스크의 앞면 또는 마스크 패턴이 형성되지 않은 포토 마스크의 뒷면에 조사할 수 있다.

公开(公告)号：KR100450665B1

公开(公告)日：2004-11-16

申请号：KR1019980003146

申请日：1998-02-04

Applicant: 삼성전자주식회사

Inventor： 남동석

IPC: H01L21/28

Abstract: PURPOSE: A semiconductor device having self-aligned contact pad is provided to increase a process margin in a photo process for forming a bit contact hole on a self-aligned direct contact pad by increasing a planar area of the self-aligned direct contact pad. CONSTITUTION: A plurality of active regions(51) are arranged on a straight line in an X-direction on a predetermined region of a semiconductor substrate and are arranged in zigzag pattern to a Y-direction. Both edge regions of the active regions are formed on a straight line in the Y-direction. A plurality of word lines(53) are used for defining both edge regions and a center region of the active regions as buried contact regions and a direct contact region. A plurality of pad division patterns(55) are used for covering a first isolation region between the buried contact regions and a second isolation region adjacent to a direct contact region.

公开(公告)号：KR1020030014857A

公开(公告)日：2003-02-20

申请号：KR1020010048740

申请日：2001-08-13

Applicant: 삼성전자주식회사

Inventor： 남동석 ,  김지수 ,  채윤숙

IPC: H01L21/28

CPC classification number: H01L21/76897

Abstract: PURPOSE: A semiconductor device having a self-aligned contact pad and a method for fabricating the same are provided to obtain a sufficient area of a photoresist layer and increase thickness of the photoresist layer by forming a photoresist pattern of a line type. CONSTITUTION: An isolation layer is arranged in a zigzag shape on an upper face of a semiconductor substrate. The isolation layer is used for defining a plurality of active regions(115) having long axes and short axes. A plurality of gates(135) and the active regions(115) cross each other. The gates(135) are extended to the short axes of the active regions(115). The first and the second source/drain regions(140a,140b) are formed on the active regions(115) of both sides of the gates(135). The first and the second self-aligned contact pads(155a,155b) are formed on the first and the second source/drain regions(140a,140b).

Abstract translation: 目的：提供具有自对准接触焊盘的半导体器件及其制造方法，以通过形成线型光致抗蚀剂图案来获得光致抗蚀剂层的足够面积并增加光致抗蚀剂层的厚度。 构成：在半导体衬底的上表面上以锯齿形布置隔离层。 隔离层用于限定具有长轴和短轴的多个有源区（115）。 多个门（135）和有源区（115）彼此交叉。 门135延伸到有源区115的短轴。 第一和第二源极/漏极区域（140a，140b）形成在栅极（135）的两侧的有源区域（115）上。 第一和第二自对准接触焊盘（155a，155b）形成在第一和第二源极/漏极区域（140a，140b）上。

公开(公告)号：KR1020010086995A

公开(公告)日：2001-09-15

申请号：KR1020000011047

申请日：2000-03-06

Applicant: 삼성전자주식회사

Inventor： 남동석

IPC: H01L21/66

Abstract: PURPOSE: A method of measuring overlay error is to precisely measure aligning error of a pattern due to optical aberration in a pattern forming process, thereby minimizing the overlay error and also rapidly measuring the overlay error. CONSTITUTION: A main scale(23) is formed on a region of a substrate in which a device pattern is not yet formed. Then, a vernier(25) is formed to be not overlapped with the main scale. Overlay error is measured by optical aberration for measuring shift of a center portion of the main scale and the vernier. The main scale or the vernier is formed on the substrate as the device pattern. In the method, the main scale is formed as the device pattern, and the vernier is formed according to a larger design rule than a design rule applied to the device pattern. Alternatively, the vernier is formed as the device pattern, and the main scale is formed according to a larger design rule than a design rule applied to the device pattern.

Abstract translation: 目的：测量重叠误差的方法是精确测量由于图案形成过程中的光学像差引起的图案的对准误差，从而最小化重叠误差并且还可以快速测量覆盖误差。 构成：在尚未形成器件图案的衬底的区域上形成主刻度（23）。 然后，游标（25）形成为不与主刻度重叠。 覆盖误差是通过用于测量主刻度和游标的中心部分的偏移的光学像差来测量的。 作为器件图案，在基板上形成主刻度或游标。 在该方法中，主刻度形成为器件图案，并且根据设计规则比应用于器件图案的设计规则更大的设计规则形成游标。 或者，游标器形成为器件图案，并且根据比应用于器件图案的设计规则更大的设计规则形成主刻度。

公开(公告)号：KR1020000026383A

公开(公告)日：2000-05-15

申请号：KR1019980043892

申请日：1998-10-20

Applicant: 삼성전자주식회사

Inventor： 남동석 ,  정정희

IPC: H01L21/027

Abstract: PURPOSE: A bio-rad key of semiconductor device is provided to correct the pattern shift generated in the range which a son scale isn't out of a mother scale, thereby reducing costs and time by reducing re-sampling time of the pattern shift. CONSTITUTION: A bio-rad key of semiconductor device comprises a son scale(20), a mother scale(10) surrounding the son scale, and a large mother(50) scale surrounding the mother scale. When error is generated, correction values of some parameters are automatically calculated by using the son scale(20) and the large mother scale(50) as well as ignoring a signal from the mother scale.

Abstract translation: 目的：提供半导体器件的生物辐射键，以校正子刻度不超出母尺度的范围内产生的图案偏移，从而通过减少图案偏移的再采样时间来降低成本和时间。 构成：半导体器件的生物雷达键包括儿子秤（20），围绕儿子秤的母秤（10）和围绕母尺度的大型母（50）刻度。 当产生误差时，通过使用子刻度（20）和大母标尺（50）自动计算一些参数的校正值，并忽略来自母尺度的信号。

公开(公告)号：KR1020150089303A

公开(公告)日：2015-08-05

申请号：KR1020140009763

申请日：2014-01-27

Applicant: 삼성전자주식회사

Inventor： 남동석

IPC: G03F1/22 ,  H01L21/027

CPC classification number: G03F1/26 ,  G03F1/24

Abstract: 본발명은포토마스크의제조방법을제공한다. 이포토마스크제조방법은제 1 영역그리고상기제 1 영역의외곽에제공되는제 2 영역을갖는투명성기판을제공하는것, 상기투명성기판상에제 1 막, 광차단막및 제 1 레지스트막을순차적층하는것, 상기제 1 레지스트막을패터닝하여상기광차단막을일부노출시키는것, 상기패터닝된제 1 레지스트막을마스크로이용하는식각으로상기광차단막을패터닝하여상기제 1 막을일부노출시키는것, 상기패터닝된제 1 레지스트막을제거하는것, 상기투명성기판상에상기패터닝된제 1 막을덮는제 2 레지스트막을형성하는것, 상기제 2 레지스트막을일부제거하여상기투명성기판의제 2 영역상에잔류제 2 레지스트막을제공하는것, 및상기잔류제 2 레지스트막을큐어링하는것을포함할수 있다.

Abstract translation: 本发明提供一种光掩模的制造方法。 本发明的光掩模的制造方法包括以下步骤：提供设置在第一区域的外部区域的具有第一区域和第二区域的透明基板; 在透明基板上依次布置第一膜，遮光膜和第一抗蚀剂膜; 通过图案化第一抗蚀剂膜来部分地曝光遮光膜; 通过使用图案化的第一抗蚀剂膜作为掩模通过蚀刻来形成遮光膜来部分曝光第一膜; 去除图案化的第一抗蚀剂膜; 形成用于覆盖所述透明基板上的所述图案化的第一膜的第二抗蚀剂膜; 部分地去除第二抗蚀剂膜并将剩余的第二抗蚀剂膜提供到透明基板的第二区域; 并固化剩余的第二抗蚀剂膜。