公开(公告)号：KR102126977B1

公开(公告)日：2020-06-25

申请号：KR1020130099173

申请日：2013-08-21

Applicant: 삼성전자주식회사

Inventor： 장언수 ,  박결 ,  박종우 ,  배진권 ,  임윤혁 ,  김지철 ,  박수재

IPC: H01L23/36 ,  H01L23/373

公开(公告)号：KR1020140146880A

公开(公告)日：2014-12-29

申请号：KR1020130069754

申请日：2013-06-18

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  김지철 ,  박결 ,  신성호

IPC: H01L23/367 ,  H01L23/373

CPC classification number: H01L23/34 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package according to an embodiment of the present invention includes: a lower package which includes a lower semiconductor chip mounted on a lower package substrate; an upper package which is stacked on the lower package and includes an upper semiconductor chip mounted on an upper package substrate which includes a center part adjacent to the lower semiconductor chip and an edge part; and a thermal boundary material which is filled between the lower package and the upper package to allow the upper package substrate to touch the upper surface of the lower semiconductor chip. The upper package substrate includes a thermal diffusion via which penetrates the center part of the upper package substrate and a connection via which is separated from the thermal diffusion via and penetrates the edge part of the upper package substrate.

Abstract translation: 根据本发明的实施例的半导体封装包括：下封装，其包括安装在下封装基板上的下半导体芯片; 堆叠在下封装上并包括安装在上封装基板上的上半导体芯片的上封装，该上封装基板包括与下半导体芯片相邻的中心部分和边缘部分; 以及填充在下封装和上封装之间的热边界材料，以允许上封装基板接触下半导体芯片的上表面。 上封装衬底包括穿过上封装衬底的中心部分的热扩散，以及与热扩散通道分离并穿透上封装衬底的边缘部分的连接。

公开(公告)号：KR101942027B1

公开(公告)日：2019-04-11

申请号：KR1020120031819

申请日：2012-03-28

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  조태제

IPC: G05F1/567

公开(公告)号：KR1020140100102A

公开(公告)日：2014-08-14

申请号：KR1020130012923

申请日：2013-02-05

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  이희석

IPC: H01L23/36 ,  H01L23/34

CPC classification number: H01L23/3733 ,  H01L23/3128 ,  H01L23/3736 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: Disclosed are a semiconductor package and a method of manufacturing the same. The semiconductor package includes a circuit board, a semiconductor chip which is mounted on the circuit board, a sealing material which is arranged on the circuit board to cover the semiconductor chip, a heat spreader which is arranged on the sealing material and discharges chip driving heat generated from the semiconductor chip to the outside, and a thermal dissipator which includes a heat capacitor which stores latent heat by absorbing excess heat which exceeds the heat transfer capacity of the heat spreader. When high power is applied to the semiconductor package, the time for reaching an allowable maximum temperate is extended and the duration time of maximum performance can be extended.

Abstract translation: 公开了一种半导体封装及其制造方法。 半导体封装包括电路板，安装在电路板上的半导体芯片，布置在电路板上以覆盖半导体芯片的密封材料，布置在密封材料上并散发芯片驱动热量的散热器 从半导体芯片产生到外部的散热器，以及散热器，其包括通过吸收超过散热器的传热能力的多余热而存储潜热的热电容器。 当向半导体封装施加高功率时，达到允许的最大温度的时间延长，并且能够延长最大性能的持续时间。

公开(公告)号：KR1020130058401A

公开(公告)日：2013-06-04

申请号：KR1020110124392

申请日：2011-11-25

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  김원근 ,  조태제 ,  박결

IPC: H01L23/28 ,  H01L23/34

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10126 ,  H01L2224/10156 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83007 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/83887 ,  H01L2224/83888 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: PURPOSE: A semiconductor package is provided to secure structure stability by controlling the filler distribution between a substrate and a semiconductor chip in an underfill process. CONSTITUTION: A semiconductor chip(210) is formed on a substrate. A heat generation pattern(118,218) is formed between the substrate and the semiconductor chip. The heat generation pattern generates heat. An underfill resin(310) is underfilled between the substrate and the semiconductor chip. The underfill resin includes a filler.

Abstract translation: 目的：提供半导体封装以通过在底部填充工艺中控制衬底和半导体芯片之间的填料分布来确保结构稳定性。 构成：在基板上形成半导体芯片（210）。 在衬底和半导体芯片之间形成发热图案（118,218）。 发热模式产生热量。 衬底和半导体芯片之间底层填充树脂310。 底部填充树脂包括填料。

公开(公告)号：KR102076044B1

公开(公告)日：2020-02-11

申请号：KR1020130055849

申请日：2013-05-16

Applicant: 삼성전자주식회사

Inventor： 장언수 ,  박결 ,  임윤혁

IPC: H01L23/373 ,  H01L23/12

公开(公告)号：KR101939240B1

公开(公告)日：2019-01-17

申请号：KR1020110124392

申请日：2011-11-25

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  김원근 ,  조태제 ,  박결

IPC: H01L23/28 ,  H01L23/34

公开(公告)号：KR101800437B1

公开(公告)日：2017-11-22

申请号：KR1020110041682

申请日：2011-05-02

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  조태제

IPC: H01L23/31 ,  H01L23/36 ,  H01L23/427

CPC classification number: H01L23/36 ,  H01L23/3128 ,  H01L23/427 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00

Abstract: 반도체패키지를제공한다. 반도체패키지는, 회로기판, 회로기판상에실장되는반도체칩, 반도체칩 및회로기판을덮으며제1 온도조절부재를포함하는몰딩재및 몰딩재를덮는열 방출부를포함한다.

Abstract translation: 提供半导体封装。 半导体封装包括电路板，安装在电路板上的半导体芯片，半导体芯片以及覆盖包括第一温度调节构件和成型材料的成型材料的散热部件。

公开(公告)号：KR1020120123986A

公开(公告)日：2012-11-12

申请号：KR1020110041682

申请日：2011-05-02

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  조태제

IPC: H01L23/31 ,  H01L23/36 ,  H01L23/427

CPC classification number: H01L23/36 ,  H01L23/3128 ,  H01L23/427 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00

Abstract: PURPOSE: A semiconductor package is provided to increase heat emission efficiency by including a temperature-controlled member in a molding material and to emit various heat energies by having phase change of a temperature-controlled member according to temperatures. CONSTITUTION: A semiconductor chip(110) is mounted on a circuit board(100). The semiconductor chip comprises a penetrating electrode(112). The penetrating electrode is electrically connected to second solder balls. An under-fill covers the second solder balls. An interval between the semiconductor chip and the circuit board is filled with the under-fill. A molding material(160) covers the semiconductor chip and the circuit board. The molding material comprises a temperature-controlled member(150). The temperature-controlled member comprises a phase change material. A heat emission part(170) covers the molding material.

Abstract translation: 目的：提供一种半导体封装件，通过将温度控制部件包括在模制材料中并通过根据温度的温度控制部件的相变来发射各种热能来提高散热效率。 构成：半导体芯片（110）安装在电路板（100）上。 半导体芯片包括穿透电极（112）。 穿透电极与第二焊球电连接。 底部填充物覆盖第二焊球。 半导体芯片和电路板之间的间隔填充有欠填充。 成型材料（160）覆盖半导体芯片和电路板。 模制材料包括温度受控构件（150）。 温度控制部件包括相变材料。 散热部（170）覆盖成型材料。

公开(公告)号：KR102211996B1

公开(公告)日：2021-02-05

申请号：KR1020200068496

申请日：2020-06-05

Applicant: 삼성전자주식회사

Inventor： 박결 ,  임윤혁 ,  장언수

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/48

Abstract: 본발명은반도체패키지를제공한다. 반도체패키지는기판; 상기기판상에배치되는하부반도체칩; 상기하부반도체칩상에배치되고, 상기하부반도체칩의양단을노출시키는상부반도체칩; 상기상부반도체칩상에배치된히트슬래그; 상기기판및 히트슬래그사이에제공되는몰딩막; 및상기하부반도체칩및 상기히트슬래그사이에개재되며, 상기하부반도체칩의양단상에제공된상부스페이서를포함할수 있다.