公开(公告)号：KR102254104B1

公开(公告)日：2021-05-20

申请号：KR1020140130335

申请日：2014-09-29

Applicant: 삼성전자주식회사

Inventor： 조차제 ,  임윤혁 ,  조태제

IPC: H01L23/34 ,  H01L23/48

Abstract: 다른종류의반도체칩이포함되는반도체패키지내부로부터발열을효율적으로외부로방출할수 있는반도체패키지를제공한다. 본발명에따른반도체패키지는패키지베이스기판, 패키지베이스기판상에부착되는적어도하나의제1 반도체칩 및적어도하나의제1 반도체칩과인접하도록패키지베이스기판상에부착되며복수의제2 반도체칩이적층된적어도하나의적층반도체칩 구조체를포함하며, 적어도하나의제1 반도체칩과인접하는적어도하나의적층반도체칩 구조체의변에복수의관통전극이형성된관통전극영역이인접하도록배치된다.

公开(公告)号：KR101942027B1

公开(公告)日：2019-04-11

申请号：KR1020120031819

申请日：2012-03-28

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  조태제

IPC: G05F1/567

公开(公告)号：KR101709959B1

公开(公告)日：2017-02-27

申请号：KR1020100114476

申请日：2010-11-17

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  김종연 ,  조태제 ,  강운병

IPC: H01L21/60 ,  H01L23/48

CPC classification number: H01L24/81 ,  H01L23/3128 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/11001 ,  H01L2224/13025 ,  H01L2224/13075 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/05552 ,  H01L2924/00

Abstract: 범프구조물은제1 범프및 제2 범프를포함한다. 상기제1 범프는기판의접속패드상에배치되며, 상기접속패드로부터연장하는다수개의나노-와이어들및 상기나노-와이어들의일단부들을연결시키는몸체부를갖는다. 상기제2 범프는상기제1 범프의상기몸체부상에배치된다.

Abstract translation: 提供一种凸块结构，包括第一凸块和第二凸块，包括该凸块的半导体封装及其制造方法。 凸块结构包括：设置在基板的连接焊盘上的第一凸块，所述第一凸块包括从所述连接焊盘延伸的多个纳米线和连接所述多个纳米线的端部的主体; 以及设置在第一凸块的主体上的第二凸块。

公开(公告)号：KR1020140100102A

公开(公告)日：2014-08-14

申请号：KR1020130012923

申请日：2013-02-05

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  박결 ,  이희석

IPC: H01L23/36 ,  H01L23/34

CPC classification number: H01L23/3733 ,  H01L23/3128 ,  H01L23/3736 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: Disclosed are a semiconductor package and a method of manufacturing the same. The semiconductor package includes a circuit board, a semiconductor chip which is mounted on the circuit board, a sealing material which is arranged on the circuit board to cover the semiconductor chip, a heat spreader which is arranged on the sealing material and discharges chip driving heat generated from the semiconductor chip to the outside, and a thermal dissipator which includes a heat capacitor which stores latent heat by absorbing excess heat which exceeds the heat transfer capacity of the heat spreader. When high power is applied to the semiconductor package, the time for reaching an allowable maximum temperate is extended and the duration time of maximum performance can be extended.

Abstract translation: 公开了一种半导体封装及其制造方法。 半导体封装包括电路板，安装在电路板上的半导体芯片，布置在电路板上以覆盖半导体芯片的密封材料，布置在密封材料上并散发芯片驱动热量的散热器 从半导体芯片产生到外部的散热器，以及散热器，其包括通过吸收超过散热器的传热能力的多余热而存储潜热的热电容器。 当向半导体封装施加高功率时，达到允许的最大温度的时间延长，并且能够延长最大性能的持续时间。

公开(公告)号：KR1020130058401A

公开(公告)日：2013-06-04

申请号：KR1020110124392

申请日：2011-11-25

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  김원근 ,  조태제 ,  박결

IPC: H01L23/28 ,  H01L23/34

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10126 ,  H01L2224/10156 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83007 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/83887 ,  H01L2224/83888 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: PURPOSE: A semiconductor package is provided to secure structure stability by controlling the filler distribution between a substrate and a semiconductor chip in an underfill process. CONSTITUTION: A semiconductor chip(210) is formed on a substrate. A heat generation pattern(118,218) is formed between the substrate and the semiconductor chip. The heat generation pattern generates heat. An underfill resin(310) is underfilled between the substrate and the semiconductor chip. The underfill resin includes a filler.

Abstract translation: 目的：提供半导体封装以通过在底部填充工艺中控制衬底和半导体芯片之间的填料分布来确保结构稳定性。 构成：在基板上形成半导体芯片（210）。 在衬底和半导体芯片之间形成发热图案（118,218）。 发热模式产生热量。 衬底和半导体芯片之间底层填充树脂310。 底部填充树脂包括填料。

公开(公告)号：KR1020120010616A

公开(公告)日：2012-02-06

申请号：KR1020100070471

申请日：2010-07-21

Applicant: 삼성전자주식회사

Inventor： 이충선 ,  김정환 ,  임윤혁 ,  황지환 ,  김현철 ,  최광철 ,  최은경 ,  민태홍

IPC: H01L23/00 ,  H01L23/29 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L23/29 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: PURPOSE: A stack package, a semiconductor package and a method of manufacturing the stack package are provided to improve the heat dissipation property of a stack package by using a support member as a heat discharging path. CONSTITUTION: A first semiconductor chip(100) comprises a semiconductor layer(110), a wiring layer(120), a connection bump(130), and a penetrating electrode(140). A second semiconductor chip(200) is laminated in the top side of the first semiconductor chip. The second semiconductor chip comprises a semiconductor layer(210), a wiring layer(220), and a micro connection bump(230). A supporting member(310) is attached to the top side of the first semiconductor chip through an adhesive layer. A molding member(330) covers the first semiconductor chip to cover the second semiconductor chip and the supporting member.

Abstract translation: 目的：提供堆叠封装，半导体封装和制造叠层封装的方法，以通过使用支撑构件作为放热路径来提高堆叠封装的散热性能。 构成：第一半导体芯片（100）包括半导体层（110），布线层（120），连接凸块（130）和穿透电极（140）。 第二半导体芯片（200）层压在第一半导体芯片的顶侧。 第二半导体芯片包括半导体层（210），布线层（220）和微连接凸块（230）。 支撑构件（310）通过粘合剂层附接到第一半导体芯片的顶侧。 模制构件（330）覆盖第一半导体芯片以覆盖第二半导体芯片和支撑构件。

公开(公告)号：KR100690926B1

公开(公告)日：2007-03-09

申请号：KR1020060010716

申请日：2006-02-03

Applicant: 삼성전자주식회사

Inventor： 유재욱 ,  임윤혁

IPC: H01L29/84

Abstract: A micro thermal flux sensor array is provided to measure heat flux vertically and horizontally by minimizing the heat resistance of a heat flux sensor. Upper and lowe sensors are formed on both surfaces of a substrate(10) including a first interconnection pattern layer(20), an insulation layer(30) and a second interconnection pattern layer(40). The first interconnection pattern layer is formed on the substrate, made of a first conductive material. The insulation layer is formed on the first interconnection pattern layer, having a via hole for exposing a predetermined part of the first interconnection pattern layer. The second interconnection pattern layer is formed on the insulation layer, made of a second conductive material and connected to the first interconnection pattern layer through the via hole. The first interconnection pattern layer includes a plurality of first measurement patterns(22) formed in every temperature measurement position and a first routing interconnection(24) for connecting each one of the first measurement patterns with an external heat flux measuring apparatus.

Abstract translation: 提供微热通量传感器阵列以通过最小化热通量传感器的热阻来垂直和水平地测量热通量。 上，下传感器形成在包括第一互连图案层（20），绝缘层（30）和第二互连图案层（40）的基板（10）的两个表面上。 第一互连图案层形成在基板上，由第一导电材料制成。 绝缘层形成在第一互连图案层上，具有用于暴露第一互连图案层的预定部分的通孔。 第二互连图案层形成在绝缘层上，由第二导电材料制成并且通过通孔连接到第一互连图案层。 第一互连图案层包括形成在每个温度测量位置中的多个第一测量图案（22）以及用于将每个第一测量图案与外部热通量测量设备连接的第一路由互连（24）。

公开(公告)号：KR1020060080420A

公开(公告)日：2006-07-10

申请号：KR1020050000805

申请日：2005-01-05

Applicant: 삼성전자주식회사

Inventor： 김상욱 ,  임윤혁

IPC: H01L23/34

CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: 열적 불일치를 최소화하고 열방출 효율을 극대화하며 경우에 따라 물리적 충격에 안정된 반도체 패키지 및 그 제조방법에 대해 개시한다. 그 패키지 및 방법은 반도체 칩의 상부면에 부착되며, 일정한 곡률을 가지는 형상의 복수개의 금속볼들이 평판형으로 배열되어 이루어진 제1 히트 스프레더롤 포함한다. 또한, 제1 히트 스프레더가 형성된 반도체 칩의 측면과 상부면을 덮는 평판형의 제2 히트 스프레더를 더 포함할 수 있다.
히트 스프레더, 열방출, 금속볼들, 평판형

公开(公告)号：KR100468783B1

公开(公告)日：2005-01-29

申请号：KR1020030008450

申请日：2003-02-11

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  백중현 ,  김민하

IPC: H01L23/50

CPC classification number: H01L23/4093 ,  F28F2280/105 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Some embodiments of the invention include two heat exchange members, which are arranged facing each other with a semiconductor module therebetween, the semiconductor module including a plurality of packages; a connection member formed in the middle of each of the heat exchange members to hinge join the heat exchange members such that portions of the heat exchange members protrude above the semiconductor module inserted between the heat exchange members; and an elastic member disposed between the heat exchange members to provide a force pushing portions of the heat exchange members below the connection member toward the packages of the semiconductor module. Other embodiments of the invention are described in the claims.

Abstract translation: 本发明的一些实施例包括两个热交换构件，所述两个热交换构件彼此面对设置，其间具有半导体模块，所述半导体模块包括多个封装; 连接构件，形成在每个热交换构件的中间以铰链连接热交换构件，使得热交换构件的一部分在插入热交换构件之间的半导体模块上方突出; 以及设置在热交换构件之间的弹性构件，以提供力将连接构件下方的热交换构件的部分推向半导体模块的封装。 在权利要求中描述了本发明的其他实施例。

公开(公告)号：KR1020030037384A

公开(公告)日：2003-05-14

申请号：KR1020010068360

申请日：2001-11-03

Applicant: 삼성전자주식회사

Inventor： 임윤혁 ,  노영훈

IPC: H01L23/34

CPC classification number: H01L23/42 ,  H01L23/16 ,  H01L2224/16225 ,  H01L2224/73253

Abstract: PURPOSE: A semiconductor package including a dam and a manufacturing method thereof are provided to be capable of preventing the malfunction of the semiconductor package due to a melted thermal interface material. CONSTITUTION: A semiconductor chip(102) is attached on a substrate(100) through a plurality of bumps(110). A TIM(Thermal Interface Material) layer(104) is attached on the upper portion of the semiconductor chip(102). A plurality of dams(106A) are in contact with the TIM layer(104) for preventing the flow of the TIM due to the heat generated from the semiconductor package. A lid part(108A) is in contact with the upper portion of the TIM layer(104) for encapsulating the semiconductor chip(102) and the dams, wherein the lid part(108A) is attached to the substrate(100) using a sealant(112).

Abstract translation: 目的：提供一种包括堤坝及其制造方法的半导体封装，以能够防止由于熔融的热界面材料引起的半导体封装的故障。 构成：通过多个凸块（110）将半导体芯片（102）附着在基板（100）上。 在半导体芯片（102）的上部附着TIM（热界面材料）层104。 多个坝（106A）与TIM层（104）接触，用于防止由于半导体封装产生的热而导致TIM流动。 盖部分（108A）与TIM层（104）的上部接触，用于封装半导体芯片（102）和坝，其中盖部分（108A）使用密封剂附接到基底（100） （112）。