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公开(公告)号：KR1020130096526A
公开(公告)日：2013-08-30
申请号：KR1020120018055
申请日：2012-02-22
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L29/792 , H01L27/11556 , H01L27/11582 , H01L21/76897 , H01L27/0688
Abstract: PURPOSE: A non-volatile memory device and a manufacturing method thereof are provided to improve the reliability of the memory device by including a contact plug and an etch stop layer pattern formed on a common source line strapping region. CONSTITUTION: Channel regions (112) are extended in the vertical direction on a substrate. Gate electrodes (150) are separated in the vertical direction and the horizontal direction along an outer wall of the channel regions. A first impurity region is provided to the substrate and is formed on the lower part of the channel regions. A first interlayer insulating film is formed on the substrate and covers the gate electrodes and the channel regions. A contact hole passes through the first interlayer insulating film and is formed between the adjacent gate electrodes. A contact plug (170) is formed in the contact hole and is electrically connected to a second impurity region. An etch stop layer pattern (182) is formed on the contact plug and the first interlayer insulating film.
Abstract translation: 目的：提供一种非易失性存储器件及其制造方法，通过包括在公共源极线捆扎区域上形成的接触插塞和蚀刻停止层图案来提高存储器件的可靠性。 构成：通道区域（112）在衬底上沿垂直方向延伸。 栅极电极（150）沿着沟道区域的外壁在垂直方向和水平方向上分离。 第一杂质区域设置在衬底上并形成在沟道区域的下部。 第一层间绝缘膜形成在基板上并覆盖栅电极和沟道区。 接触孔穿过第一层间绝缘膜并形成在相邻的栅电极之间。 接触插塞（170）形成在接触孔中并与第二杂质区电连接。 在接触插塞和第一层间绝缘膜上形成蚀刻停止层图案（182）。
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Patent Agency Ranking
公开(公告)号：KR101603161B1
公开(公告)日：2016-03-15
申请号：KR1020090110694
申请日：2009-11-17
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L21/28
Abstract: 도전구조물, 이의형성방법및 이를포함하는반도체소자및 그제조방법에서, 도전구조물은기판상에형성되는텅스텐패턴을포함한다. 상기텅스텐패턴상부면의적어도일부영역에는상기텅스텐패턴이표면이산화됨으로써생성된텅스텐산화물패턴이구비된다. 이와같이, 상기도전구조물은하부의텅스텐패턴상에상기텅스텐패턴에비해높은저항을갖는텅스텐산화물패턴이포함되어있다. 상기도전구조물에포함되는높은저항을갖는텅스텐산화물패턴은주울히팅을위한가열전극또는저항체등으로사용될수 있다.
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公开(公告)号：KR1020140104563A
公开(公告)日：2014-08-29
申请号：KR1020130017488
申请日：2013-02-19
Applicant: 삼성전자주식회사
CPC classification number: B24B37/30 , B24B37/042 , B24B37/10 , B24B37/32
Abstract: The present invention relates to a chemical-mechanical polishing apparatus and a polishing head assembly, including a polishing head assembly having a polishing head body and a membrane arranged onto the bottom of the polishing head body. The bottom surface of the membrane has a hydrophilic zone and a hydrophobic zone. According to the present invention, during a chemical-mechanical polishing process, capillary force and surface tension generated in between a wafer and a head membrane of the chemical-mechanical polishing apparatus can be controlled to prevent sliding. Moreover, damage to the wafer can be prevented when separating the wafer from the head membrane of the chemical-mechanical polishing apparatus, after finishing the chemical-mechanical polishing process.
Abstract translation: 本发明涉及一种化学机械抛光装置和抛光头组件，其包括具有抛光头本体和布置在抛光头本体的底部上的膜的抛光头组件。 膜的底表面具有亲水区和疏水区。 根据本发明，在化学机械抛光工艺期间，可以控制在化学机械抛光装置的晶片和头膜之间产生的毛细管力和表面张力，以防止滑动。 此外，在完成化学机械抛光工艺之后，当将晶片与化学机械抛光装置的头膜分离时，可以防止晶片损坏。
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公开(公告)号：KR1020100128219A
公开(公告)日：2010-12-07
申请号：KR1020090110694
申请日：2009-11-17
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L21/28
Abstract: PURPOSE: A conductive structure, a method for forming the same, a semiconductor device including the same, and a method for manufacturing the same are provided to regulate resistance values by including a highly integrated conductive structure. CONSTITUTION: An interlayer insulating film(52) including an opening part is formed on a substrate(50). A conductive region is exposed through the opening part. A part of a tungsten oxide pattern(60) is contained in the opening part. The tungsten oxide pattern is in connection with the conductive region. A tungsten pattern(58b) is in contact with the lower side of the tungsten oxide pattern.
Abstract translation: 目的：提供导电结构，其形成方法，包括该导电结构的半导体器件及其制造方法，以通过包括高度集成的导电结构来调节电阻值。 构成：在基板（50）上形成包括开口部的层间绝缘膜（52）。 导电区域通过开口部分露出。 氧化钨图案（60）的一部分被包含在开口部分中。 氧化钨图案与导电区域连接。 钨图案（58b）与氧化钨图案的下侧接触。
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公开(公告)号：KR101964263B1
公开(公告)日：2019-04-01
申请号：KR1020120018055
申请日：2012-02-22
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
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