公开(公告)号：KR1020000026286A

公开(公告)日：2000-05-15

申请号：KR1019980043762

申请日：1998-10-16

Applicant: 삼성전자주식회사

Inventor： 김진성 ,  박재구 ,  심경만 ,  이영구

IPC: H01L21/304

Abstract: PURPOSE: A method for preventing the occurrence of the particle is provided to eliminate the damage layer and to enhance the quality of the silicon cathode electrode by carrying out the poly etch process and to prevent the occurrence of particle by the silicon cathode electrode by testing the quality of the silicon cathode electrode. CONSTITUTION: A system comprises a plasma etch apparatus(2), a stage(10), a wafer(12), an original silicon cathode plate(14), a test sample(14a), a hole, and a plasma etch chamber(16). A gas distribution plate consists of silicon. The forming of hole(15) is carried out after the lapping treatment of the original silicon cathode plate(14) and then it is cut into the shape of test sample. The wafer is dry etched and the process which has low etch ratio against the plate is carried out before the process which has high etch ratio. Therefore the damage layer made when forming the silicon cathode electrode is eliminated and the occurrence of the particle due to the silicon cathode electrode is prevented.

Abstract translation: 目的：提供一种防止颗粒发生的方法，以通过进行多层蚀刻工艺来消除损伤层并提高硅阴极的质量，并通过测试硅阴极电极来防止硅阴极发生颗粒 硅阴极电极的质量。 构成：系统包括等离子体蚀刻装置（2），载物台（10），晶片（12），原始硅阴极板（14），测试样品（14a），孔和等离子体蚀刻室 16）。 气体分配板由硅组成。 在原始硅阴极板（14）的研磨处理之后进行孔（15）的形成，然后将其切割成测试样品的形状。 干燥蚀刻晶片，并且在具有高蚀刻比的工艺之前进行相对于板的低蚀刻比的工艺。 因此，消除了在形成硅阴极电极时制成的损伤层，并且防止了由于硅阴极引起的颗粒的发生。

公开(公告)号：KR1020010083348A

公开(公告)日：2001-09-01

申请号：KR1020000006546

申请日：2000-02-11

Applicant: 삼성전자주식회사

Inventor： 김정주 ,  신은희 ,  심경만 ,  태기영

IPC: H01L21/30

Abstract: PURPOSE: An upper electrode of plasma equipment is provided to extend a lifetime of the upper electrode by decreasing a worn-out phenomenon at the surface of a gas injection hole, and to reduce a defect caused by contamination particles by decreasing the contamination particles inside a process chamber. CONSTITUTION: An upper electrode of plasma equipment includes a body and a gas injection hole(110) formed in the body. The body is composed of a metal plate type. The gas injection hole has an upstream part and a downstream part. The corners of the upstream part and the downstream part are round-shaped.

Abstract translation: 目的：提供等离子体设备的上电极，通过减少气体注入孔表面的磨损现象来延长上电极的寿命，并通过减少污染颗粒内的污染颗粒来减少由污染颗粒引起的缺陷 处理室。 构成：等离子体设备的上电极包括主体和形成在体内的气体注入孔（110）。 身体由金属板型组成。 气体注入孔具有上游部和下游部。 上游部分和下游部分的角部是圆形的。

公开(公告)号：KR100528475B1

公开(公告)日：2005-11-15

申请号：KR1020030021471

申请日：2003-04-04

Applicant: 삼성전자주식회사

Inventor： 심경만 ,  이태원 ,  성순환 ,  박재영

IPC: H01L21/205

Abstract: 본 발명은 웨이퍼에 박막을 증착하는 화학 기상 증착 장치에 관한 것으로, 공정챔버와, 상기 공정챔버 내부에 설치되어 상기 웨이퍼가 안착되는 척과, 상기 척 둘레에 배치되며 제 1공정가스를 분사하는 적어도 하나 이상의 고정관과 그리고, 상기 척 둘레에 배치되며, 제 2공정가스를 분사하고 분사부의 위치가 조절되는 이동관을 포함하되, 상기 이동관의 분사부 위치는 제 1부재와 제 2부재가 슬라이드 이동됨과 동시에, 위치설정장치에 의해 조절된다. 본 발명으로 인해 웨이퍼에 증착되는 박막을 균일하게 형성할 수 있다.

公开(公告)号：KR1020050025522A

公开(公告)日：2005-03-14

申请号：KR1020030062864

申请日：2003-09-08

Applicant: 삼성전자주식회사

Inventor： 이태원 ,  배도인 ,  심경만 ,  조정훈 ,  박유춘

IPC: H01L21/30

Abstract: A semiconductor manufacturing heater block is provided to improve the uniformity of heat conductivity by minimizing a gap between a hot wire and a body and installing a heat conductor in the body. A semiconductor manufacturing heater block includes an upper body(100) for loading stably a wafer, upper installing grooves(110) roundly formed under the upper body, a hot wire(300) inserted in the upper installing grooves, and a lower body. The lower body(200) includes lower installing grooves(210) roundly formed on the upper surface corresponding to the shape of the hot wire. The upper body includes a heat conductor(500) between the wafer loading surface and the hot wire.

Abstract translation: 提供半导体制造加热器块，以通过最小化热丝和主体之间的间隙并在体内安装热导体来改善导热性的均匀性。 半导体制造加热器块包括用于稳定地加载晶片的上体（100），在上体下方圆形地形成的上安装槽（110），插入在上安装槽中的热丝（300）和下体。 下体（200）包括圆形地形成在与热丝的形状对应的上表面上的下安装槽（210）。 上体包括在晶片装载表面和热丝之间的热导体（500）。

公开(公告)号：KR1020020067823A

公开(公告)日：2002-08-24

申请号：KR1020010008177

申请日：2001-02-19

Applicant: 삼성전자주식회사

Inventor： 이영구 ,  김진성 ,  심경만

IPC: H01L21/28

Abstract: PURPOSE: A method for fabricating a contact hole spacer of a semiconductor device is provided to prevent cone-type protrusions formed in a bevel part of a wafer from being etched in a cleaning process, by preventing a spacer layer formed in the bevel part from being etched in a spacer etch process for forming a contact hole. CONSTITUTION: The contact hole is formed in an interlayer dielectric formed on a wafer(100). The spacer layer is formed on the interlayer dielectric. An etch preventing member(200) is installed to prevent the spacer layer formed in the bevel part(110) which is the edge of the wafer from being etched. The spacer layer is etched back to form a spacer in the contact hole. The wafer having the spacer is cleaned by a cleaning material.

Abstract translation: 目的：提供一种用于制造半导体器件的接触孔间隔件的方法，用于防止在清洁过程中形成在晶片的斜面部分中的锥形突起被蚀刻，通过防止形成在斜面部分中的间隔层为 在用于形成接触孔的间隔物蚀刻工艺中蚀刻。 构成：接触孔形成在晶片（100）上形成的层间电介质中。 间隔层形成在层间电介质上。 安装防蚀构件（200）以防止形成在作为晶片边缘的斜面部分（110）中的间隔层被蚀刻。 间隔层被回蚀以在接触孔中形成间隔物。 具有间隔件的晶片由清洁材料清洁。

公开(公告)号：KR1020080063938A

公开(公告)日：2008-07-08

申请号：KR1020070000565

申请日：2007-01-03

Applicant: 삼성전자주식회사

Inventor： 심경만 ,  양윤식 ,  김학필 ,  박유춘

IPC: H01L21/324 ,  H01L21/205 ,  H01L21/02

CPC classification number: C23C16/46 ,  C23C16/4586 ,  C23C16/509

Abstract: An apparatus for manufacturing a semiconductor and a heater of the same are provided to prevent the arcing and fail at a position adjacent to a lower electrode and a ground line by using an insulator having a sub-insulating unit. A heater block(161) has a heating body(161a) and a lower electrode(120). A plurality of heater power supply lines(162) are electrically connected to the heating body. A ground line has a first portion inputted into the lower electrode of the heater block and electrically connected to the heater block, and a second portion being extended from the first portion to the outside of the lower electrode. An insulator has a main insulating unit for surrounding the second portion of the ground line and a sub-insulating unit for surrounding the first portion of the ground line. The main insulating unit of the insulator is located between the ground line and the heater power supply line, and the sub-insulating unit of the insulator is located between the ground line and the lower electrode.

Abstract translation: 提供一种用于制造半导体及其加热器的装置，以通过使用具有次级绝缘单元的绝缘体来防止在与下电极和接地线相邻的位置处的电弧和失效。 加热器块（161）具有加热体（161a）和下电极（120）。 多个加热器电源线（162）电连接到加热体。 接地线具有输入到加热器块的下电极并电连接到加热器块的第一部分，并且第二部分从第一部分延伸到下电极的外部。 绝缘体具有用于包围接地线的第二部分的主绝缘单元和用于围绕接地线的第一部分的次绝缘单元。 绝缘体的主绝缘单元位于地线和加热器电源线之间，绝缘子的次绝缘单元位于地线和下电极之间。

公开(公告)号：KR1020010016658A

公开(公告)日：2001-03-05

申请号：KR1019990031667

申请日：1999-08-02

Applicant: 삼성전자주식회사

Inventor： 심경만 ,  김진성

IPC: H01L21/60

CPC classification number: H01L2924/0002 ,  H01L2924/00

Abstract: PURPOSE: A method for bonding a semiconductor substrate and a graphite for a silicon cathode is provided to prevent economical loss and process loss, by eliminating a sanding process for intensifying adhesion, and by removing a process for eliminating In. CONSTITUTION: A jig is adhered to a silicon substrate(10) so that only a bonding portion of the silicon substrate to be bonded to a graphite(20) is exposed. After the silicon substrate of which only the bonding surface(24) is exposed is put into a vacuum sputter and a Ti sputtering process is performed in a vacuum state and by using plasma, Ag and Sn are sequentially vacuum-deposited. After the silicon substrate is withdrawn form the sputter, the jig is bonded to the graphite to process a bonding surface of the graphite so that only the bonding surface of the graphite is partially exposed. A Ti sputtering process using a vacuum sputter is performed regarding the bonding surface to be bonded to the silicon substrate. After Ti and Cu are sputtered, only Cu is sputtered again, Ag and Sn are sequentially vacuum-deposited. In of a wire shape is wound/inserted into a dented groove(22) of the graphite. After the graphite having inserted graphite is inserted into a furnace and heated to a melting point or higher for sufficient melting, the silicon substrate is placed and pressed on the melted graphite.

Abstract translation: 目的：提供一种用于接合半导体衬底和用于硅阴极的石墨的方法，通过消除用于增强粘合力的砂磨工艺，以及通过去除In的方法来消除经济损失和工艺损失。 构成：将夹具粘附到硅衬底（10）上，使得仅将与石墨（20）接合的硅衬底的接合部分露出。 在仅将接合表面（24）暴露的硅衬底放入真空溅射中，并且在真空状态下进行Ti溅射工艺，并且通过使用等离子体，依次真空沉积Ag和Sn。 在从溅射器取出硅衬底之后，将夹具结合到石墨上以处理石墨的粘合表面，使得只有石墨的粘结表面部分露出。 对与硅基板接合的接合面进行使用真空溅射的Ti溅射工艺。 在溅射Ti和Cu之后，仅再次溅射Cu，Ag和Sn顺序真空沉积。 线的形状被卷绕/插入到石墨的凹槽（22）中。 将插入石墨的石墨插入炉中并加热至熔点以上以进行充分熔融之后，将硅衬底放置并压在熔融的石墨上。

公开(公告)号：KR1020000008536A

公开(公告)日：2000-02-07

申请号：KR1019980028404

申请日：1998-07-14

Applicant: 삼성전자주식회사

Inventor： 심경만 ,  김상호

IPC: H01L21/66

Abstract: PURPOSE: An apparatus and method for measuring inside diameter of clamp ring in a semiconductor manufacturing equipment capable of improving yield of a wafer, a performance of equipment, and measuring clamp rings having various sizes by exactly judging a change time of the clamp ring are provided. CONSTITUTION: The apparatus for measuring inside diameter of clamp ring in a semiconductor manufacturing equipment, the apparatus comprising: a base plate(1), a clamp ring(2) is mounted therein; a rotating plate(3) rotatably supported on the base plate(1); a gauge(5) installed at the rotating plate(3), and being rotated along the inside diameter of the clamp ring(2) measuring a displacement of a contacting portion which contacts with the inside diameter face of the clamp ring(2); a contacting portion forward and back means installed to the rotating plate(3) and forwarding and backing the contacting portion so that the contacting portion is selectively contacted with the inside diameter face of the clamp ring(2).

Abstract translation: 目的：提供一种用于测量半导体制造设备中的内径的装置和方法，该半导体制造设备能够通过准确判断夹紧环的变化时间来提高晶片的产量，设备的性能和测量具有各种尺寸的夹紧环 。 构成：用于测量半导体制造设备中的夹紧环的内径的装置，该装置包括：基板（1），夹紧环（2）; 可旋转地支撑在基板（1）上的旋转板（3）; 安装在所述旋转板（3）上的测量器（5），并且沿着所述夹紧环（2）的内径旋转，测量与所述夹紧环（2）的内径面接触的接触部分的位移; 接触部分前后装置安装到旋转板（3）并且前进和后靠接触部分，使得接触部分选择性地与夹紧环（2）的内径面接触。

公开(公告)号：KR1019990066450A

公开(公告)日：1999-08-16

申请号：KR1019980002382

申请日：1998-01-26

Applicant: 삼성전자주식회사

Inventor： 김진성 ,  이영구 ,  심경만 ,  최규상

IPC: H01J9/02 ,  H01J1/30

Abstract: 본 발명은 플라즈마식각장치의 캐소우드 제조방법 및 이에 따라 제조되는 캐소우드에 관한 것이다.
본 발명의 제조방법은, 플라즈마식각장치의 캐소우드로 제조할 수 있는 실리콘기판에 식각공정의 수행시 식각챔버로 가스를 유입시킬 수 있는 홀을 복수개 형성시키는 홀형성단계; 상기 실리콘기판의 표면을 슬러리를 이용하여 연마시키는 물리적표면처리단계; 및 상기 실리콘기판에 형성시킨 홀의 내면 및 상기 실리콘기판의 표면에 잔존하는 돌기 등을 수산화칼륨을 이용하여 제거시키는 화학적표면처리단계를 구비하여 이루어짐을 특징으로 한다.
본 발명은, 실리콘기판을 이용하여 제조할 수 있는 플라즈마식각장치의 캐소우드를 수산화칼륨을 이용하여 상기 실리콘기판에 형성시킨 홀의 내면 및 그 표면을 처리하여 경면으로 형성시킨 것을 특징으로 한다.
따라서, 캐소우드로 제조되는 실리콘기판의 표면 및 홀의 내면을 경면으로 형성시킴으로써 파티클의 발생소스를 사전에 제거하여 이로 인한 불량의 발생을 최소화시켜 반도체소자의 신뢰도가 향상되는 효과가 있다.

公开(公告)号：KR1020040087198A

公开(公告)日：2004-10-13

申请号：KR1020030021471

申请日：2003-04-04

Applicant: 삼성전자주식회사

Inventor： 심경만 ,  이태원 ,  성순환 ,  박재영

IPC: H01L21/205

Abstract: PURPOSE: A CVD apparatus is provided to control a position of an injection part by using a moving tube including the first member having a projection and the second member having a guide part. CONSTITUTION: A chuck(130) is installed in an inside of a process chamber(100). A wafer is loaded on an upper surface of the chuck. One or more fixing tubes(140) are arranged around the chuck in order to inject the first process gas. A moving tube(200) is arranged around the chuck in order to inject the second process gas. The moving tube includes the first member(210) and the second member(220). A projection is formed on one side of the first member opposite to the second member. A guide part is formed on the second member in order to guide the projection. The first member slides on the second member in order to control a position of an injection part.

Abstract translation: 目的：提供一种CVD装置，用于通过使用包括具有突起的第一构件的移动管和具有引导部的第二构件来控制注射部的位置。 构成：将卡盘（130）安装在处理室（100）的内部。 将晶片装载在卡盘的上表面上。 一个或多个固定管（140）布置在卡盘周围以便注入第一工艺气体。 为了喷射第二处理气体，在卡盘周围布置移动管（200）。 移动管包括第一构件（210）和第二构件（220）。 在与第二构件相对的第一构件的一侧上形成突起。 引导部分形成在第二部件上以引导突起。 第一构件在第二构件上滑动以便控制注射部件的位置。