Abstract:
집적회로 소자는 기판 상에서 수평 방향으로 연장된 도전 라인 및 절연막을 관통하는 채널 홀 내에서 상기 수직 방향으로 연장된 채널막과, 상기 도전 라인과 상기 채널막의 사이에 개재된 전하 트랩 패턴과, 상기 절연막과 상기 채널막의 사이에 개재된 더미 전하 트랩 패턴을 포함한다. 집적회로 소자를 제조하기 위하여, 절연막 및 몰드막을 포함하는 구조물을 관통하는 채널 홀을 형성하고, 상기 몰드막의 일부를 제거하여 상기 채널 홀과 연결되는 몰드 인덴트를 형성하고, 상기 몰드 인덴트 내부에 예비 유전 패턴을 형성하고, 상기 예비 유전 패턴을 산화시켜 제1 블로킹 유전 패턴을 형성하고, 채널 홀 내에 전하 트랩막을 형성하고, 상기 몰드막을 제거하여 도전 공간을 형성하고, 도전 공간을 통해 상기 전하 트랩막의 일부를 제거하여 복수의 전하 트랩 패턴 및 복수의 더미 전하 트랩 패턴을 형성한다.
Abstract:
A TFT array panel and an LCD device including the same are provided to enable field generating electrodes to form an electric field parallel with the surface of an insulating substrate, thereby securing a wide viewing angle as liquid molecules are inclined at various angles, securing a high transmittance as the liquid molecules operate in an OCB(Optically Compensated Bend) method, and improving a response rate. A TFT(Thin Film Transistor) array panel(100) includes an insulating substrate(110), plural first signal lines, plural second signal lines, plural TFTs, plural first field generating electrodes(131,191), and plural second field generating electrodes. The plural first signal lines are formed in the upper part of the insulating substrate. The plural second signal lines are insulated from the first signal lines to cross the first signal lines. The plural TFTs are formed in the upper part of the insulating substrate and are formed in the upper part of a first insulating substrate and a second insulating substrate. The plural first field generating electrodes are electrically connected to the TFTs. The plural second field generating electrodes form an electric field parallel with the surface of the insulating substrate with the first field generating electrodes. One of the first and second field generating electrodes is made of a conductive material.
Abstract:
The present invention relates to a semiconductor memory device and a method for fabricating the same. A semiconductor memory device according to one embodiment of the present invention includes: a first conductive line and a second conductive line which are separated from each other; and a first sacrificial layer pattern interposed between the first conductive line and the second conductive line. According to the embodiment of the present invention, the first sacrificial layer pattern has a concave sidewall.
Abstract:
A thin film transistor substrate and a method of manufacturing the same, and liquid crystal panel having the same are provided to prevent error by minimizing reaction of an alignment film and impurity. A thin film transistor substrate(100) includes a gate line, a data line, a pixel electrode(151) and an alignment film(171). The gate line is formed by extending in the one direction on the substrate, and the data line is formed by extending to cross with the gate line. The pixel electrode is formed on a pixel area defined by the gate line and the data line. The alignment film is formed on the pixel electrode and is formed by patterning with the pixel electrode in the same time. The thin film transistor substrate further includes a gate electrode, a source electrode, and a drain electrode. The drain electrode overlaps to a portion of the gate electrode.
Abstract:
An LCD(Liquid Crystal Display) is provided to compensate phase retardation of an LC cell by disposing a biaxial compensation film between an LC panel and a polarizing plate, thereby improving a contrast ratio of the LCD, and improving wide view characteristics and optical characteristics. An LC panel comprises a first substrate, a second substrate facing the first substrate, and an LC layer(130). The LC layer is interposed between the first and second substrates and horizontally aligned. When a vertical electric field is applied, the LC layer is vertically arranged. A first polarizing plate(210) is disposed in a lower side of the LC panel, and polarizes light in a first direction. A second polarizing plate(220) is disposed in an upper side of the LC panel, and polarizes light in a second direction. Biaxial compensation films(310,320) are disposed between the LC panel and one of the first and second substrates. In the biaxial compensation film, a first optical axis and a second optical axis vertical to the first optical axis are formed to compensate phase retardation of the LC layer when the vertical electric field is applied to the LC panel.