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公开(公告)号:KR1020100113117A
公开(公告)日:2010-10-20
申请号:KR1020107017903
申请日:2008-03-13
Applicant: 소이텍
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L29/78603 , H01L29/32 , H01L29/7841 , H01L31/0248 , H01L27/10844
Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
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公开(公告)号:KR101196791B1
公开(公告)日:2012-11-05
申请号:KR1020107017903
申请日:2008-03-13
Applicant: 소이텍
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L29/78603 , H01L29/32 , H01L29/7841 , H01L31/0248
Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
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公开(公告)号:KR101236219B1
公开(公告)日:2013-02-22
申请号:KR1020110077449
申请日:2011-08-03
Applicant: 소이텍
IPC: H01L21/20
CPC classification number: H01L21/187 , H01L22/12 , H01L22/20 , H01L24/75 , H01L24/80 , H01L24/94 , H01L25/50 , H01L2224/08146 , H01L2224/75702 , H01L2224/75756 , H01L2224/80006 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/94 , H01L2924/00014 , H01L2224/80
Abstract: 본딩 전에의 고유한 곡률을 가지는 제1 웨이퍼(100)를 본딩 전에의 고유한 곡률을 가지는 제2 웨이퍼(200)에 직접하는 본딩으로서, 두 개의 웨이퍼들의 적어도 하나(100)는 적어도 하나의 계열의 마이크로 구성요소들(110)을 포함한다. 방법은, 두 개의 웨이퍼들 사이에 본딩 파동의 전달이 시작되도록, 두 개의 웨이퍼들(100, 200)을 서로 접촉시키는 적어도 하나의 단계를 포함한다.
접촉시키는 단계를 수행하는 동안에, 본딩 전에의 하나의 계열의 마이크로 구성요소들(110)을 포함하는 웨이퍼(100)의 고유한 곡률(K1)에 의존하여, 회전 포물선면의 형태의 미리 한정된 본딩 곡률(KB)이 두 개의 웨이퍼들의 하나에 부과되고, 미리 한정된 본딩 곡률 (KB)에 합치되도록 다른 웨이퍼는 자유롭다.-
公开(公告)号:KR101217682B1
公开(公告)日:2012-12-31
申请号:KR1020110043179
申请日:2011-05-06
Applicant: 소이텍
Inventor: 고댕그웰타즈
IPC: H01L21/20
CPC classification number: H01L21/185 , B32B37/144 , B32B37/18 , B32B38/1808 , B32B38/1866 , B32B41/00 , B32B2041/04 , B32B2307/202 , B32B2309/72 , B32B2457/14 , H01L21/187 , H01L24/75 , H01L24/80 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/08146 , H01L2224/75702 , H01L2224/75703 , H01L2224/75756 , H01L2224/75901 , H01L2224/80006 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/94 , H01L2924/3511 , Y10T156/10 , Y10T156/1089 , Y10T156/1092 , H01L2224/80
Abstract: 제2 웨이퍼(200) 상에분자접합에의해제1 웨이퍼(100)를결합하는방법으로, 웨이퍼들은웨이퍼들사이에초기반지름방향오정렬을갖는다. 상기방법은두 개의웨이퍼들사이에결합파의전달이시작되도록두 개의웨이퍼들(100, 200)을접촉시키는적어도하나의단계를포함한다. 본발명에따르면, 소정결합곡률(K)이, 접촉시키는단계중에초기반지름방향오정렬의함수로서두 개의웨이퍼들중 적어도하나에부과된다.
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公开(公告)号:KR1020120031255A
公开(公告)日:2012-04-02
申请号:KR1020110077449
申请日:2011-08-03
Applicant: 소이텍
IPC: H01L21/20
CPC classification number: H01L21/187 , H01L22/12 , H01L22/20 , H01L24/75 , H01L24/80 , H01L24/94 , H01L25/50 , H01L2224/08146 , H01L2224/75702 , H01L2224/75756 , H01L2224/80006 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/94 , H01L2924/00014 , H01L2224/80
Abstract: PURPOSE: A direct bonding method for reducing overlay misalignment is provided to minimize defective interconnection by mutually connecting micro components by wire bonding. CONSTITUTION: A first support plate(310) has a holding surface(311) which keeps a first wafer(100) to face a second wafer(200). The first support plate includes a cylinder(321). The second wafer is located on a holding surface of a second support plate(320) in a bonding device(300). The first and the second support plates are equipped to have a retaining means. Each first and second wafer is compressed while being held in the holding surfaces of the support plates.
Abstract translation: 目的:提供减少重叠失准的直接接合方法,以通过引线接合相互连接微型元件来最大限度地减少缺陷互连。 构成:第一支撑板(310)具有保持第一晶片(100)面对第二晶片(200)的保持表面(311)。 第一支撑板包括气缸(321)。 第二晶片位于接合装置(300)中的第二支撑板(320)的保持表面上。 第一和第二支撑板配备有保持装置。 每个第一和第二晶片在被保持在支撑板的保持表面中时被压缩。
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公开(公告)号:KR1020120004917A
公开(公告)日:2012-01-13
申请号:KR1020110043179
申请日:2011-05-06
Applicant: 소이텍
Inventor: 고댕그웰타즈
IPC: H01L21/20
CPC classification number: H01L21/185 , B32B37/144 , B32B37/18 , B32B38/1808 , B32B38/1866 , B32B41/00 , B32B2041/04 , B32B2307/202 , B32B2309/72 , B32B2457/14 , H01L21/187 , H01L24/75 , H01L24/80 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/08146 , H01L2224/75702 , H01L2224/75703 , H01L2224/75756 , H01L2224/75901 , H01L2224/80006 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/94 , H01L2924/3511 , Y10T156/10 , Y10T156/1089 , Y10T156/1092 , H01L2224/80
Abstract: PURPOSE: A molecule splicing junction method is provided to recompense initial radius directional alignment which is formed between two wafers which are combined. CONSTITUTION: A first wafer(100) and a second wafer(200) are arranged to face by using a first holding supporting part(310) and a second holding supporting part(320). The first holding supporting part provides a designated curvature radius to the first wafer. The wafers are contacted in order to transfer coupled waves between the wafers. Designated bonding curvature is provided to the first wafer by operating a jack(312) which is mounted on the first holding supporting part. The designated bonding curvature is placed between the first wafer and the first holding supporting part.
Abstract translation: 目的:提供一种分子拼接结方法来补偿在组合的两个晶片之间形成的初始半径方向对准。 构成:第一晶片(100)和第二晶片(200)通过使用第一保持支撑部(310)和第二保持支撑部(320)而布置成面对。 第一保持支撑部分向第一晶片提供指定的曲率半径。 接触晶片以在晶片之间传输耦合波。 通过操作安装在第一保持支撑部上的插座(312),将指定的接合曲率提供给第一晶片。 指定的接合曲率被放置在第一晶片和第一保持支撑部之间。
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