公开(公告)号：JP2003204037A

公开(公告)日：2003-07-18

申请号：JP2002364007

申请日：2002-12-16

Applicant: ABB RESEARCH LTD

Inventor： MEYSENC LUC ,  HAMIDI AMINA ,  JOERG PIEDER ,  AKDAG ALPER

IPC: H01L25/07 ,  H01L25/16 ,  H01L25/18

Abstract: PROBLEM TO BE SOLVED: To provide a module housing and a power semiconductor module having an improved dielectric strength and an enhanced blocking voltage performance. SOLUTION: A power module housing comprises two electric insulation housing elements (1, 2) being fixed mutually. The first housing element (2) has power terminals (31, 32) and at least two openings (24) for groove-like recesses (23). Three insulation walls (11, 21, 22) are arranged on the surface of the housing and perpendicularly thereto between the openings (24). One insulation wall (11) is a part of the second housing element (1) and inserted into the recess (23) of the first housing element (2), and at least one of the second insulation walls (21, 22) is a part of the first housing element (2). Arrangement of the terminals can be simplified by the insulation walls between the openings for power terminals. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003197861A

公开(公告)日：2003-07-11

申请号：JP2002350739

申请日：2002-12-03

Applicant: ABB RESEARCH LTD

Inventor： BIJLENGA BO ,  ZWICK FABIAN ,  HAMIDI AMINA ,  MEYSENC LUC ,  KAUFMANN STEFAN ,  ERNE PATRICK

IPC: H01L23/48 ,  H01L25/07 ,  H01L25/18

Abstract: PROBLEM TO BE SOLVED: To provide a power semiconductor submodule and power semiconductor module which have higher blocking voltages and are substantially equal in physical height to each other. SOLUTION: The power semiconductor module (1) has at least two semiconductor chips (21, 22), which have two main electrodes 3 and 4 between two main connection parts (6, 7) and also have one main electrode (3) applied with a contact force by a contact die (8) to press the other electrode (4) against a base plate (5). Those two semiconductor chips (21, 22) are electrically connected in series between two main connection parts (6, 7) of the power semiconductor submodule. COPYRIGHT: (C)2003,JPO

公开(公告)号：WO2006039823A3

公开(公告)日：2006-06-01

申请号：PCT/CH2005000574

申请日：2005-10-04

Applicant: ABB RESEARCH LTD ,  CELANOVIC NIKOLA ,  MEYSENC LUC ,  MAZUR MICHAEL ,  RUDOLF PAUL

Inventor： CELANOVIC NIKOLA ,  MEYSENC LUC ,  MAZUR MICHAEL ,  RUDOLF PAUL

IPC: H03K17/785

CPC classification number: H03K17/78 ,  H02M1/08 ,  H02M7/797 ,  H02M2001/0003 ,  H03K17/082

Abstract: A signal transmission system serves to activate at least one power semiconductor switch (S 1 , S 2 , , S n ) starting from a controller (11). At least one control signal can be transmitted from the controller (11) to at least one modulator (M 1 , M 2 , ..., M n ) via at least one first transmission path (3). Each power semiconductor switch (S 1 , S 2 , , S n ) is connected to an activating electrode driver stage (G 1 , G 2 , ..., G n ), and at least one activating signal can be transmitted from the at least one modulator (M 1 , M 2 , ..., M n ) to each of the activating electrode driver stages (G 1 , G 2 , , G n ) via a second transmission path (4). At least one control signal and/or one activating signal can be transmitted by means of electromagnetic radiation, and the associated transmission path (3, 4) is lineless.

Abstract translation: 的信号传输系统是至少一个功率半导体开关（S _{1 ，S 2 ，S 名词）由用于驱动控制器（11）的。 来自控制器（11）为至少一个控制信号到至少一个调制器（M 1 中，M 2 ，...，M 名词）经由 至少一个第一传送路径（3）转让。 每个功率半导体开关（S 1 ，S 2 ，S 名词）是具有一个Ansteuerelektrodentreiberstufe（G 1 ， ģ 2 ，...，G 名词），并从所述至少一个调制器（M 1 中，M 2 ，...，M 名词）是至少一个驱动信号给每个Ansteuerelektrodentreiberstufen（G 1 ，G 2 ，G 的 ñ）经由各自的第二传输路径转移（4）。 至少一个控制信号和/或驱动信号可通过电磁辐射和相关的传输路径来传输（3，4）是无线的。}

公开(公告)号：CA2587421C

公开(公告)日：2012-04-17

申请号：CA2587421

申请日：2004-11-22

Applicant: ABB RESEARCH LTD

Inventor： STEIMER PETER ,  BARBOSA PETER ,  MEYSENC LUC

IPC: H02M7/48 ,  H02M7/49

Abstract: A converter circuit is specified for switching of a multiplicity of switching voltage levels, which have n first switching groups (1.1, ..., 1.n) for each phase (R, S, T), with the n-th first switching group (1.n) being formed by a first drivable bidirectional power semiconductor switch (2) and a second drivable bidirectional power semiconductor switch (3), and with the first first switching group (1.1) to the (n-1)-th switching group (1.(n-1)) each being formed by a first drivable bidirectional power. semiconductor switch (2) and a second drivable bidirectional power semiconductor switch (3), and by a capacitor (4) which is connected to the first and second drivable bidirectional power semiconductor switches (2, 3) with each of the n first switching groups (1.1, ..., 1.n) being connected in a linked form to the respectively adjacent first switching group (1.1, ..., 1.n), and with the first and the second drivable bidirectional power semiconductor switches (2, 3) in the first first switching group (1.1) being connected to one another. In order to reduce the stored electrical energy in the converter circuit, n >= 1, and p second switching groups (5.1, ..., 5.p) and p third switching groups (6.1, ..., 6.p) are provided, which each have a first drivable bidirectional power semiconductor switch (7, 8), a second drivable bidirectional power semiconductor switch (9, 10) and a capacitor (13, 14), where p >= 1. Each of the p second switching groups (5.1, ..., 5.p) is connected in a linked form to the respectively adjacent second switching group (5.1, ..., 5.p), and each of the p third switching groups (6.1, ..., 6.p) is connected in a linked form to the respectively adjacent third switching group (6.1, ..., 6.p). Furthermore, the first second and the first third switching group (5.1, 6.1) each have a third drivable bidirectional power semiconductor switch (11, 12) which is connected back--to-back in series with the respective second drivable bidirectional power semiconductor switch (9, 10), with the first second switching group (5.1) being connected to the first drivable bidirectional power semiconductor switch (2) in the n-th first switching group (1.n), and with the first third switching group (6.1) being connected to the second drivable bidirectional power semiconductor switch (3) in the n-th first switching group (1.n), and the capacitor (13) in the p-th second switching group (5.p) is connected in series with the capacitor (14) in the p-th third switching group (6.p).

公开(公告)号：HK1105250A1

公开(公告)日：2008-02-06

申请号：HK07113594

申请日：2007-12-13

Applicant: ABB RESEARCH LTD

Inventor： STEIMER PETER ,  BARBOSA PETER ,  MEYSENC LUC

IPC: H02M7/48 ,  H02M7/49

Abstract: A converter circuit is disclosed for switching of a multiplicity of switching voltage levels, which have n first switching groups for each phase (R, S, T), with the n-th first switching group being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and with the first switching group to the (n-1)-th switching group each being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and by a capacitor which is connected to the first and second drivable bidirectional power semiconductor switches with each of the n first switching groups being connected in a linked form to the respectively adjacent first switching group, and with the first and the second drivable bidirectional power semiconductor switches in the first switching group being connected to one another.

公开(公告)号：DE60129146T2

公开(公告)日：2007-12-13

申请号：DE60129146

申请日：2001-12-24

Applicant: ABB RESEARCH LTD

Inventor： MEYSENC LUC ,  HAMIDI AMINA ,  JOERG PIEDER ,  AKDAG ALPER

IPC: H01L25/16 ,  H01L25/07 ,  H01L25/18

Abstract: The power module housing comprises two electrically insulating housing elements (1, 2) that are attached to each other. A first of said housing elements (2) comprises at least two openings (24) for electric power terminals (31, 32) and a slot-like recess (23). Between the openings (24) three insulating walls (11, 21, 22) are arranged on and perpendicular to a surface of the housing. One insulating wall (11) is part of a second of said housing elements (1) and is inserted into the recess (23) in said first housing element (2), while an at least one second of said insulating walls (21, 22) is part of the first housing element (2). The insulating walls between the openings for the power terminals allow a compact arrangement of the terminals.

公开(公告)号：AU2003203111A8

公开(公告)日：2003-09-04

申请号：AU2003203111

申请日：2003-02-13

Applicant: ABB RESEARCH LTD

Inventor： MEYSENC LUC ,  HAMIDI AMINA ,  AKDAG ALPER ,  JOERG PIEDER

IPC: H01L25/07 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10 ,  H01L23/62 ,  H01L25/18 ,  H05K5/06 ,  H05K7/14

公开(公告)号：AU2003203111A1

公开(公告)日：2003-09-04

申请号：AU2003203111

申请日：2003-02-13

Applicant: ABB RESEARCH LTD

Inventor： MEYSENC LUC ,  HAMIDI AMINA ,  JOERG PIEDER ,  AKDAG ALPER

IPC: H01L25/07 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10 ,  H01L23/62 ,  H01L25/18 ,  H05K5/06 ,  H05K7/14 ,  H05K7/00

公开(公告)号：DE60129146D1

公开(公告)日：2007-08-09

申请号：DE60129146

申请日：2001-12-24

Applicant: ABB RESEARCH LTD

Inventor： MEYSENC LUC ,  HAMIDI AMINA ,  JOERG PIEDER ,  AKDAG ALPER

IPC: H01L25/16 ,  H01L25/07 ,  H01L25/18

Abstract: The power module housing comprises two electrically insulating housing elements (1, 2) that are attached to each other. A first of said housing elements (2) comprises at least two openings (24) for electric power terminals (31, 32) and a slot-like recess (23). Between the openings (24) three insulating walls (11, 21, 22) are arranged on and perpendicular to a surface of the housing. One insulating wall (11) is part of a second of said housing elements (1) and is inserted into the recess (23) in said first housing element (2), while an at least one second of said insulating walls (21, 22) is part of the first housing element (2). The insulating walls between the openings for the power terminals allow a compact arrangement of the terminals.

公开(公告)号：CA2587421A1

公开(公告)日：2006-05-26

申请号：CA2587421

申请日：2004-11-22

Applicant: ABB RESEARCH LTD

Inventor： BARBOSA PETER ,  MEYSENC LUC ,  STEIMER PETER

IPC: H02M7/48 ,  H02M7/49

Abstract: A converter circuit is disclosed for switching of a multiplicity of switching voltage levels, which have n first switching groups for each phase (R, S, T), with the n-th first switching group being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and with the first switching group to the (n-1)-th switching group each being formed by a first drivable bidirectional power semiconductor switch and a second drivable bidirectional power semiconductor switch, and by a capacitor which is connected to the first and second drivable bidirectional power semiconductor switches with each of the n first switching groups being connected in a linked form to the respectively adjacent first switching group, and with the first and the second drivable bidirectional power semiconductor switches in the first switching group being connected to one another.