Abstract:
An integrated circuit (IC) (200) includes a semiconductor material (102), electronic circuitry (104) formed on the semiconductor material (102), a contact layer (106) formed on the electronic circuitry (104), a final passivation layer (108) formed on the contact layer (106) and an under-bump metallurgy (UBM) (216) formed on at least a portion of the final passivation layer (108). The contact layer (106) includes a plurality of contacts pads (106A) for providing external access to the electronic circuitry (104). The final passivation layer (108) includes a plurality of windows that extend through the final passivation layer (108) to the contact pads (106A). The UBM (216) includes an aluminum layer having a thickness of about 800 angstroms to about 1200 angstroms, a nickel/vanadium (Ni/V) layer having a thickness of about 800 angstroms to about 1200 angstroms and a copper (Cu) layer having a thickness of about 800 angstroms to about 1200 angstroms.
Abstract:
An integrated circuit (IC) (200) includes a semiconductor material (102), electronic circuitry (104) formed on the semiconductor material (102), a contact layer (106) formed on the electronic circuitry (104), a final passivation layer (108) formed on the contact layer (106) and an under-bump metallurgy (UBM) (216) formed on at least a portion of the final passivation layer (108). The contact layer (106) includes a plurality of contacts pads (106A) for providing external access to the electronic circuitry (104). The final passivation layer (108) includes a plurality of windows that extend through the final passivation layer (108) to the contact pads (106A). The UBM (216) includes an aluminum layer having a thickness of about 800 angstroms to about 1200 angstroms, a nickel/vanadium (Ni/V) layer having a thickness of about 800 angstroms to about 1200 angstroms and a copper (Cu) layer having a thickness of about 800 angstroms to about 1200 angstroms.
Abstract:
An electronic assembly (400) includes an integrated circuit (IC) die (306), a substrate (302) and a no-flow underfill (310) applied between the IC die (306) and the substrate (302). The IC die (306) includes a plurality of conductive contacts formed on a surface of the die (306). The substrate (302) includes a plurality of conductive traces (304) formed on a surface of the substrate (302) and electrically connected to at least one of the conductive contacts by electrical interconnects (320). The interconnects (320) each include a polymer core having an electrically conductive solderable outer surface. The polymer core has a coefficient of thermal expansion (CTE) that approximately matches the CTE of the no-flow underfill (310).
Abstract:
A no-flow underfill material (20) and process suitable for underfilling a bumped circuit component (10). The underfill material (20) initially comprises a dielectric polymer material (22) in which is dispersed a precursor capable of reacting to form an inorganic filler (24). The underfill process generally entails dispensing the underfill material (20) over terminals (18) on a substrate (16), and then placing the component (10) on the substrate (16) so that the underfill material (20) is penetrated by the bumps (12) on the component (10) and the bumps (12) contact the terminals (18) on the substrate (16). The bumps (12) are then reflowed to form solid electrical interconnects (26) that are encapsulated by the resulting underfill layer (28). The precursor may be reacted to form the inorganic filler (24) either during or after reflow.
Abstract:
A conductive adhesive material (12) characterized by metallurgical bonds (24) between electrically-conductive particles (20) dispersed in a polymer matrix (22) of the material (12). The polymer matrix (22) has a fluxing capability when heated to reduce metal oxides on the surfaces of the particles (20). At least the outer surfaces of the particles (20) are formed of a fusible material, so that sufficiently heating the conductive adhesive material (12) will reduce metal oxides on the particles (20), and at least partially melt the fusible metal, enabling the particles (20) to metallurgically bond to each other and to metal surfaces (14,16,44,46,54,56) contacted by the adhesive material (12).
Abstract:
An electronic assembly (400) includes an integrated circuit (IC) die (306), a substrate (302) and a no-flow underfill (310) applied between the IC die (306) and the substrate (302). The IC die (306) includes a plurality of conductive contacts formed on a surface of the die (306). The substrate (302) includes a plurality of conductive traces (304) formed on a surface of the substrate (302) and electrically connected to at least one of the conductive contacts by electrical interconnects (320). The interconnects (320) each include a polymer core having an electrically conductive solderable outer surface. The polymer core has a coefficient of thermal expansion (CTE) that approximately matches the CTE of the no-flow underfill (310).
Abstract:
A tin-lead solder alloy containing copper and optionally silver as its alloying constituents. The solder alloy consists essentially of, by weight, about 55% to about 75% tin, about 11% to about 44% lead, up to about 4% silver, nickel, palladium, platinum and/or gold, greater than 1% to about 10% copper, and incidental impurities. The solder alloys contain a small portion of CuSn intermetallic compounds, and exhibit a melting mechanism in which all but the intermetallic compounds melt within a narrow temperature range, though the actual liquidus temperature of the alloys may be considerably higher, such that the alloys can be treated as requiring peak reflow temperatures of about 250°C or less. The intermetallic compounds precipitate out to form a diffusion barrier that increases the reliability of solder connections formed therewith.