公开(公告)号：US20240405181A1

公开(公告)日：2024-12-05

申请号：US18733304

申请日：2024-06-04

Applicant: EPISTAR CORPORATION

Inventor： Min-Hsun HSIEH ,  Shih-An LIAO ,  Wei-Yu CHEN ,  Li-Shen TANG ,  Kun-Wei KAO ,  Jia-Xing CHUNG ,  Wei-Shan HU ,  Ching-Tai CHENG ,  Chang-Tai HSIAO ,  Yih-Hua RENN ,  Chun-Yen WU

IPC: H01L33/62 ,  H01L25/075 ,  H01L33/40

Abstract: An embodiment of the present disclosure provides a semiconductor device arrangement. This arrangement includes a substrate, an adhesive structure, and a first semiconductor device. The substrate includes an upper surface. The adhesive structure is located on the upper surface and includes a first concave region. The first semiconductor device includes a lower surface facing toward the adhesive structure and a conductive bump located under the lower surface and in the first concave region. The conductive bump includes a first portion and a second portion. Wherein the lower surface does not contact the adhesive structure, the first portion contacts the first concave region, and the second portion does not contact the first concave region.

公开(公告)号：US20240363817A1

公开(公告)日：2024-10-31

申请号：US18208353

申请日：2023-06-12

Applicant: EPISTAR CORPORATION

Inventor： Jia-Xing CHUNG ,  Wei-Shan HU ,  Ching-Tai CHENG ,  Shih-An LIAO

IPC: H01L33/62 ,  H01L33/38 ,  H01L33/40 ,  H01S5/042

CPC classification number: H01L33/62 ,  H01L33/38 ,  H01L33/40 ,  H01S5/04252 ,  H01S5/04254 ,  H01L33/20

Abstract: A semiconductor device includes a semiconductor stack, a protective layer on the semiconductor stack, an electrode on the semiconductor stack and electrically connected to the semiconductor stack, and a conductive bump on the electrode. The thickness of the conductive bump is measured from the topmost point of the conductive bump to the uppermost surface of the protective layer. The ratio of the thickness of the conductive bump to the maximum width of the conductive bump is between 0.1 and 0.4, and the electrode is devoid of gold.