-
公开(公告)号:DE69432010T2
公开(公告)日:2003-09-25
申请号:DE69432010
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:DE3787399T2
公开(公告)日:1994-04-21
申请号:DE3787399
申请日:1987-04-22
Applicant: IBM
Inventor: HERRON LESTER WYNN , LUSSOW ROBERT OTIS , NUFER ROBERT WOLFF , SCHWARTZ BERNARD , ACOCELLA JOHN , REDDY SRINIVASA N
Abstract: A multilayered ceramic (MLC) substrate having embedded and exposed conductors suitable for mounting and interconnecting a plurality of electronic devices exterior thereof. The horizontal planar conductors comprise substantially a plurality of solid, non porous, homogeneous metal patterns (26), whereas the vertical interplanar connection conductors (26A) are substantially porous metal conductors that are formed by methods such as screening. The process to form the MLC substrate involves forming a pattern of solid, nonporous conductors to a backing sheet (24) having a release layer, then transferring the pattern to a ceramic green sheet (22). Zero X-Y shrinkage sintering processes allow the MLC substrate and solid metal conductors to be densified without distortion of the solid metal patterns or the ceramic.
-
公开(公告)号:CA2134019C
公开(公告)日:1999-03-30
申请号:CA2134019
申请日:1994-10-21
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , HOEBENER KARL GRANT , WATSON DAVID PAUL , CORBIN JOHN S JR
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42 , H05K1/18
Abstract: High melting temperature Pb/Sn 95/5 solder balls ale connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn so lder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic so lder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The str ucture is reflowed to simultaneously melt the solder on both sides of the halls to allow e ach ball to center between the carrier pad and circuit board pad to form a more symmetric joint. Th is process results in structure that are more reliable under high temperature cycling. Also to further improve reliability the balls are made as large as the I/O spacing allows withou t bridging beam on balls; the two pads are about the same size with more solder on the smaller p ad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larg er substrate sizes columns are used instead of balls.
-
公开(公告)号:DE3787399D1
公开(公告)日:1993-10-21
申请号:DE3787399
申请日:1987-04-22
Applicant: IBM
Inventor: HERRON LESTER WYNN , LUSSOW ROBERT OTIS , NUFER ROBERT WOLFF , SCHWARTZ BERNARD , ACOCELLA JOHN , REDDY SRINIVASA N
Abstract: A multilayered ceramic (MLC) substrate having embedded and exposed conductors suitable for mounting and interconnecting a plurality of electronic devices exterior thereof. The horizontal planar conductors comprise substantially a plurality of solid, non porous, homogeneous metal patterns (26), whereas the vertical interplanar connection conductors (26A) are substantially porous metal conductors that are formed by methods such as screening. The process to form the MLC substrate involves forming a pattern of solid, nonporous conductors to a backing sheet (24) having a release layer, then transferring the pattern to a ceramic green sheet (22). Zero X-Y shrinkage sintering processes allow the MLC substrate and solid metal conductors to be densified without distortion of the solid metal patterns or the ceramic.
-
公开(公告)号:DE69434160D1
公开(公告)日:2004-12-30
申请号:DE69434160
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:DE69432010D1
公开(公告)日:2003-02-20
申请号:DE69432010
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:DE69434160T2
公开(公告)日:2005-12-08
申请号:DE69434160
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:AT283136T
公开(公告)日:2004-12-15
申请号:AT99125772
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:AT231042T
公开(公告)日:2003-02-15
申请号:AT94114605
申请日:1994-09-16
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD RAY , BENENATI JOSEPH ANGELO , CAULFIELD THOMAS , CORBIN JOHN SAUNDERS JR , HOEBENER KARL GRANT , WATSON DAVID P
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
公开(公告)号:CA2134019A1
公开(公告)日:1995-04-29
申请号:CA2134019
申请日:1994-10-21
Applicant: IBM
Inventor: ACOCELLA JOHN , BANKS DONALD R , BENENATI JOSEPH A , CAULFIELD THOMAS , HOEBENER KARL G , WATSON DAVID P , CORBIN JOHN S JR
IPC: B23K1/00 , H01L21/48 , H01L23/488 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/36 , H05K3/42 , H05K1/18
Abstract: High melting temperature Pb/Sn 95/5 solder balls (18) are connected to copper pads on the bottom of a ceramic chip carrier substrate (10) by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling. Also, to further improve reliability, the balls are made as large as the I/O spacing allows without bridging beam on balls; the two pads are about the same size with more solder on the smaller pad; the pads are at least 75% of the ball diameter; and the eutectic joints are made as large as possible without bridging between pads. For reliability at even higher temperature cycles or larger substrate sizes columns are used instead of balls.
-
-
-
-
-
-
-
-
-