中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

12 records (took 0.075 seconds)

    INTEGRATED FABRICATION METHOD OF FORMING CONNECTORS THROUGH INSULATIVE LAYERS
    2.
    发明专利
    INTEGRATED FABRICATION METHOD OF FORMING CONNECTORS THROUGH INSULATIVE LAYERS 未知

    公开(公告)号：CA1082370A

    公开(公告)日：1980-07-22

    申请号：CA278887

    申请日：1977-05-20

    Applicant: IBM

    Inventor： CHANG KENNETH

    IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H05K3/14 ,  H05K3/40 ,  H01L21/312

    Abstract: AN INTEGRATED FABRICATION METHOD OF FORMING CONNECTORS THROUGH INSULATIVE LAYERS In integrated circuit fabrication, a method is provided for forming metallic connectors through a layer of electrically insulative material. The method comprises forming a layer of electrically insulative material on a substrate and then forming a mask of photoresist material having a plurality of openings through which said insulative layer is exposed on said insulative layer. Then, the exposed portions of said insulative layer are removed by etching to form openings through which the underlying substrate is exposed, after which a first metal layer is deposited over the masked substrate. This metal layer is thinner than the insulative layer so that the openings in the insulative layer are only filled part way up with metal. Then, the photoresist mask is removed thereby removing the metal layer deposited on it to leave only the metal in the insulative layer openings. Next, a second layer of metal is deposited over the first insulative layer and over the remaining metal in said openings, after which portions of the second metal layer over the insulative layer are removed to form a metallization pattern which is continuous with the metal in said openings.

    3.
    发明专利
    未知

    公开(公告)号：DE2729030A1

    公开(公告)日：1978-01-05

    申请号：DE2729030

    申请日：1977-06-28

    Applicant: IBM

    Inventor： CHANG KENNETH

    IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H05K3/14 ,  H05K3/40 ,  H01L21/90

    Abstract: In integrated circuit fabrication, a method is provided for forming metallic connectors through a layer of electrically insulative material. The method comprises forming a layer of electrically insulative material on a substrate and then forming a mask of photoresist material having a plurality of openings through which said insulative layer is exposed on said insulative layer. Then, the exposed portions of said insulative layer are removed by etching to form openings through which the underlying substrate is exposed, after which a first metal layer is deposited over the masked substrate. This metal layer is thinner than the insulative layer so that the openings in the insulative layer are only filled part way up with metal. Then, the photoresist mask is removed thereby removing the metal layer deposited on it to leave only the metal in the insulative layer openings. Next, a second layer of metal is deposited over the first insulative layer and over the remaining metal in said openings, after which portions of the second metal layer over the insulative layer are removed to form a metallization pattern which is continuous with the metal in said openings.

    PROCESS FOR FORMING A METALLURGY INTERCONNECTION SYSTEM
    5.
    发明专利
    PROCESS FOR FORMING A METALLURGY INTERCONNECTION SYSTEM 未知

    公开(公告)号：DE3163966D1

    公开(公告)日：1984-07-12

    申请号：DE3163966

    申请日：1981-06-10

    Applicant: IBM

    Inventor： CHANG KENNETH ,  CHIU GEORGE TEIN-CHU ,  HOEG ANTHONY JOHN ,  LEE LINDA HWA-CHUN

    IPC: H01L21/3213 ,  G03F7/00 ,  H05K3/00 ,  H05K3/06 ,  H05K3/10 ,  H05K3/14 ,  H05K3/16 ,  H05K3/46 ,  G03F7/26 ,  H01L23/50

    Abstract: In the process a first and a second layer (12 or 14 respectively) of insulative material, first layer (12) being etchable selectively in the presence of second layer (14) and a photoresist layer (16), are deposited successively. A pattern corresponding to the negative of the desires metallurgy pattern is formed photolithographically followed by the etching of the areas of layers (12) and (14) not covered by the photoresist. Then a blanket metal layer (24) is deposited. Thereon a planarizing photoresist layer (26, 28) is applied and subsequently etched to expose high spots (32) of metal layer (24), and finally metal high spots (32) are etched to a depth sufficient to expose the surface of second layer (14). … The process is useful in forming planar single- or multilevel metal interconnection systems for integrated circuits with high component density.

    6.
    发明专利
    未知

    公开(公告)号：FR2357071A1

    公开(公告)日：1978-01-27

    申请号：FR7716062

    申请日：1977-05-18

    Applicant: IBM

    Inventor： CHANG KENNETH

    IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H05K3/14 ,  H05K3/40 ,  H01L21/92

    Abstract: In integrated circuit fabrication, a method is provided for forming metallic connectors through a layer of electrically insulative material. The method comprises forming a layer of electrically insulative material on a substrate and then forming a mask of photoresist material having a plurality of openings through which said insulative layer is exposed on said insulative layer. Then, the exposed portions of said insulative layer are removed by etching to form openings through which the underlying substrate is exposed, after which a first metal layer is deposited over the masked substrate. This metal layer is thinner than the insulative layer so that the openings in the insulative layer are only filled part way up with metal. Then, the photoresist mask is removed thereby removing the metal layer deposited on it to leave only the metal in the insulative layer openings. Next, a second layer of metal is deposited over the first insulative layer and over the remaining metal in said openings, after which portions of the second metal layer over the insulative layer are removed to form a metallization pattern which is continuous with the metal in said openings.

    7.
    发明专利
    未知

    公开(公告)号：CH614562A5

    公开(公告)日：1979-11-30

    申请号：CH593877

    申请日：1977-05-12

    Applicant: IBM

    Inventor： CHANG KENNETH

    IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H05K3/14 ,  H05K3/40 ,  H01L21/88 ,  H01L21/302

    Abstract: In integrated circuit fabrication, a method is provided for forming metallic connectors through a layer of electrically insulative material. The method comprises forming a layer of electrically insulative material on a substrate and then forming a mask of photoresist material having a plurality of openings through which said insulative layer is exposed on said insulative layer. Then, the exposed portions of said insulative layer are removed by etching to form openings through which the underlying substrate is exposed, after which a first metal layer is deposited over the masked substrate. This metal layer is thinner than the insulative layer so that the openings in the insulative layer are only filled part way up with metal. Then, the photoresist mask is removed thereby removing the metal layer deposited on it to leave only the metal in the insulative layer openings. Next, a second layer of metal is deposited over the first insulative layer and over the remaining metal in said openings, after which portions of the second metal layer over the insulative layer are removed to form a metallization pattern which is continuous with the metal in said openings.

Patent Agency Ranking