公开(公告)号：JP2004214629A

公开(公告)日：2004-07-29

申请号：JP2003396383

申请日：2003-11-26

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： SADANA DEVENDRA K ,  BEDELL STEPHEN W ,  CHEN TZE-CHIANG ,  CHOE KWANG SU ,  FOGEL KEITH E

IPC: H01L21/76 ,  H01L21/02 ,  H01L21/20 ,  H01L21/324 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/12

CPC classification number: H01L21/324 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02694 ,  H01L21/823807 ,  Y10S438/96

Abstract: PROBLEM TO BE SOLVED: To develop a new improved method for forming a relaxed SiGe-on-insulator substrate material which is thermodynamically stable with respect to the generation of a defect.
SOLUTION: Silicon to which tensile stress is applied is formed by epitaxially growing over the whole SiGe alloy layer. Silicon to which compressive stress is applied is formed by epitaxially growing over the whole porous silicon. A method of converting a patterned SOI region into patterned an SGOI (silicon-germanium ON oxide) by a SiGe/SOI heat mixing process for farther reinforcing the performance of a logic circuit in a padded DRAM is described in a preferred embodiment. The SGOI region in which Si is strained acts as a template for succeeding Si growth so that electrons and holes in the Si have higher mobilities.
COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2006100479A

公开(公告)日：2006-04-13

申请号：JP2004283273

申请日：2004-09-29

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： CHOE KWANG SU ,  FOGEL KEITH ,  SADANA DEVENDRA K

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/265

Abstract: PROBLEM TO BE SOLVED: To provide a silicon-on-insulator (SOI) substrate structure and a manufacturing method thereof which are simple and cost-efficient.
SOLUTION: The method for manufacturing the SOI substrate structure is provided by oxidizing porous Si having a gradient. This porous Si having the gradient is formed by first implanting a (p-type or n-type) dopant into a substrate containing Si, activating this dopant using an activating annealing step, and then anodizing this implanted and activated dopant region in a solution containing HF. This Si having the gradient has a relatively coarse upper surface layer and a fine porous layer buried directly under this upper surface layer. According to the oxidation step, the fine buried porous layer is changed into a buried oxide layer, and the coarse upper surface layer is fused into a solid Si containing over-layer due to surface migration of Si atoms.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种简单且成本有效的绝缘体上硅（SOI）衬底结构及其制造方法。 解决方案：通过氧化具有梯度的多孔Si来提供SOI衬底结构的制造方法。 具有梯度的该多孔Si通过首先将（p型或n型）掺杂剂注入到含有Si的衬底中，使用活化退火步骤激活该掺杂剂，然后将该注入和活化的掺杂剂区域阳极氧化在含有 HF。 具有梯度的Si具有相对粗糙的上表面层和直接埋在该上表面层下方的细多孔层。 根据氧化步骤，由于Si原子的表面迁移，精细埋入多孔层变成掩埋氧化物层，粗糙的上表面层被熔融成为含有Si的固体Si层。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：WO2005034209A3

公开(公告)日：2005-05-19

申请号：PCT/US2004031823

申请日：2004-09-28

Applicant: IBM ,  CHOE KWANG SU ,  FOGEL KEITH E ,  MAURER SIEGFRIED L ,  MITCHELL RYAN M ,  SADANA DEVENDRA K

Inventor： CHOE KWANG SU ,  FOGEL KEITH E ,  MAURER SIEGFRIED L ,  MITCHELL RYAN M ,  SADANA DEVENDRA K

IPC: H01L21/265 ,  H01L21/3063 ,  H01L21/316 ,  H01L21/762 ,  H01L21/20

CPC classification number: H01L21/76243 ,  H01L21/26533 ,  H01L21/3063 ,  H01L21/31662

Abstract: A method of fabricating silicon-on-insulators (SOIs) having a thin, but uniform buried oxide region beneath a Si-containing over-layer is provided. The SOI structures are fabricated by first modifying a surface of a Si-containing substrate to contain a large concentration of vacancies or voids. Next, a Si-containing layer is typically, but not always, formed atop the substrate and then oxygen ions are implanted into the structure utilizing a low-oxygen dose. The structure is then annealed to convert the implanted oxygen ions into a thin, but uniform thermal buried oxide region.

Abstract translation: 提供了一种制造在含Si的上层下方具有薄但均匀的掩埋氧化物区域的硅绝缘体（SOI）的方法。 通过首先修饰含Si衬底的表面以包含大量的空位或空隙的浓度来制造SOI结构。 接下来，含硅层通常但不总是形成在衬底顶上，然后使用低氧剂量将氧离子注入到结构中。 然后将结构退火以将注入的氧离子转化成薄但均匀的热掩埋氧化物区域。

公开(公告)号：WO2005031810A3

公开(公告)日：2005-06-23

申请号：PCT/US2004029378

申请日：2004-09-10

Applicant: IBM ,  BEDELL STEPHEN W ,  CHOE KWANG SU ,  FOGEL KEITH F ,  SADANA DEVENDRA K

Inventor： BEDELL STEPHEN W ,  CHOE KWANG SU ,  FOGEL KEITH F ,  SADANA DEVENDRA K

IPC: C22F1/10 ,  H01L21/20 ,  H01L21/762

CPC classification number: H01L21/76227 ,  C22F1/10 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/76245 ,  H01L29/78603

Abstract: A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.

Abstract translation: 提供一种形成依赖于在含Ge层下形成的多孔硅层（或区域）的氧化的绝缘体上硅的简单且直接的方法。 该方法包括以下步骤：提供包括其中形成有富空穴的含Si衬底和含Si衬底顶部的含Ge层的结构; 将富含孔的区域转化为多孔区域; 并退火包括多孔区域的结构，以提供基本上松弛的绝缘体上的SiGe。

公开(公告)号：DE602004007940D1

公开(公告)日：2007-09-13

申请号：DE602004007940

申请日：2004-09-10

Applicant: IBM

Inventor： BEDELL STEPHEN W ,  CHOE KWANG SU ,  FOGEL KEITH F ,  SADANA DEVENDRA K

IPC: H01L21/00 ,  C22F1/10 ,  H01L21/20 ,  H01L21/762

Abstract: A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.

公开(公告)号：DE602004007940T2

公开(公告)日：2008-04-24

申请号：DE602004007940

申请日：2004-09-10

Applicant: IBM

Inventor： BEDELL STEPHEN W ,  CHOE KWANG SU ,  FOGEL KEITH F ,  SADANA DEVENDRA K

IPC: H01L21/00 ,  C22F1/10 ,  H01L21/20 ,  H01L21/762

Abstract: A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.

公开(公告)号：AT368939T

公开(公告)日：2007-08-15

申请号：AT04809708

申请日：2004-09-10

Applicant: IBM

Inventor： BEDELL STEPHEN ,  CHOE KWANG SU ,  FOGEL KEITH ,  SADANA DEVENDRA

IPC: H01L21/762 ,  C22F1/10 ,  H01L21/20

Abstract: A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.