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公开(公告)号：GB2544940A
公开(公告)日：2017-05-31
申请号：GB201704618
申请日：2015-09-01
Applicant: IBM
Inventor： VEERESH VIDYADHAR DESHPANDE , SADANAND VINAYAK DESHPANDE , DANIEL CORLISS , OLEG GLUSCHENKOV , SIVARAMA KRISHNAN
IPC: H05G2/00
Abstract: An extreme ultraviolet (EUV) radiation source pellet(8) includes at least one metal particle (30) embedded within a heavy noble gas cluster (20) contained within a noble gas shell cluster (10). The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle (30) and releasing the electrons into the heavy noble gas cluster(20). Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster (20) triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.
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Patent Agency Ranking
公开(公告)号：GB2583206B
公开(公告)日：2022-09-07
申请号：GB202007913
申请日：2018-12-04
Applicant: IBM
Inventor： EKMINI ANUJA DE SILVA , DARIO GOLDFARB , NELSON FELIX , DANIEL CORLISS , RUDY J WOJTECKI
IPC: H01L21/302 , G03F7/11 , H01L21/027
Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
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公开(公告)号：GB2581755A
公开(公告)日：2020-08-26
申请号：GB202008806
申请日：2018-11-22
Applicant: IBM
Inventor： SHAWN PETER FETTEROLF , MICHAEL A GUILLORN , DANIEL CORLISS , DERREN NEYLON DUNN
Abstract: An embodiment of the invention may include a method for ensuring semiconductor design integrity. The method may include analyzing a photomask design for a semiconductor circuit. The photomask may include an electrical design necessary for the operation of the semiconductor circuit, and white space, which has no electrical design. The method may include inserting an optical design into the white space of the photomask design for the semiconductor circuit. The optical design may have known optical patterns for validating the semiconductor circuit design. In an embodiment of the invention, the optical design may be physically isolated from the electrical design. In another embodiment of the invention, the optical design may comprise one or more photomask layers and overlay the electrical design. In another embodiment of the invention, the optical design may comprise covershapes.
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公开(公告)号：GB2581755B
公开(公告)日：2020-12-23
申请号：GB202008806
申请日：2018-11-22
Applicant: IBM
Inventor： SHAWN PETER FETTEROLF , MICHAEL A GUILLORN , DANIEL CORLISS , DERREN NEYLON DUNN
Abstract: An embodiment of the invention may include a semiconductor structure for ensuring semiconductor design integrity. The semiconductor structure may include an electrical circuit necessary for the operation of the semiconductor circuit and white space having no electrical circuit. The semiconductor structure may include an optical pattern used for validating the semiconductor circuit design formed in the white space of the electrical circuit. In an embodiment of the invention, the optical pattern may include one or more deposition layers. In an embodiment of the invention, the optical pattern may include covershapes. In an embodiment of the invention, the optical pattern may be physically isolated from the electrical circuit. The optical pattern may include a Moiré pattern.
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公开(公告)号：GB2583206A
公开(公告)日：2020-10-21
申请号：GB202007913
申请日：2018-12-04
Applicant: IBM
Inventor： EKMINI ANUJA DE SILVA , DARIO GOLDFARB , NELSON FELIX , DANIEL CORLISS , RUDY J WOJTECKI
IPC: H01L21/302
Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
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公开(公告)号：GB2544940B
公开(公告)日：2018-06-27
申请号：GB201704618
申请日：2015-09-01
Applicant: IBM
Inventor： VEERESH VIDYADHAR DESHPANDE , SADANAND VINAYAK DESHPANDE , DANIEL CORLISS , OLEG GLUSCHENKOV , SIVARAMA KRISHNAN
IPC: H05G2/00
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