公开(公告)号：WO2014033567A1

公开(公告)日：2014-03-06

申请号：PCT/IB2013056276

申请日：2013-07-31

Applicant: IBM ,  IBM JAPAN ,  IBM RES GMBH

Inventor： DESPONT MICHEL ,  GROGG DANIEL ,  HAGLEITNER CHRISTOPH ,  PU YU

IPC: H03K19/02

CPC classification number: H03K19/02 ,  H03K19/20

Abstract: The invention refers to a dynamic logic gate comprising a nano-electro-mechanical- switch, preferably a four-terminal-nano-electro-mechanical-switch. The invention further refers to dynamic logic cascade circuits comprising such a dynamic logic gate. In particular, embodiments of the invention concern dynamic logic cascade circuits comprising single or dual rail dynamic logic gates.

Abstract translation: 本发明涉及一种包括纳米机电开关，优选四端子纳米机电开关的动态逻辑门。 本发明还涉及包括这种动态逻辑门的动态逻辑级联电路。 特别地，本发明的实施例涉及包括单轨或双轨动态逻辑门的动态逻辑级联电路。

公开(公告)号：GB2497379A

公开(公告)日：2013-06-12

申请号：GB201214521

申请日：2012-08-15

Applicant: IBM

Inventor： GROGG DANIEL ,  DESPONT MICHEL ,  KNOLL ARMIN W

IPC: H01H1/00

Abstract: A nano-electromechanical switch 1 comprises a curved cantilever beam 5 that flexes in response to an activation voltage applied between the beam and an actuator electrode 2 to close an electrical contact between the beam 5 and an output electrode 4. Before, during and after flexing of said curved cantilever beam 5 a remaining gap gR between the curved cantilever beam 5 and the actuator electrode 2 is substantially uniform. Beam 5 may rotate around a point of rotation POR when flexing and a motion direction angel b between a direction of motion DOM around the rotation point POR and a surface of the beam facing the actuator electrode can be designed such that after rotation the remaining gap is substantially uniform. The direction of motion angle b may be constant. A flexible hinge 5a may connect be the beam with an input electrode 3 and be less stiff than the main body of the beam. An initial gap g0 may be constant and formed by removal of a sacrificial layer during fabrication of the switch.

公开(公告)号：GB2518185A

公开(公告)日：2015-03-18

申请号：GB201316262

申请日：2013-09-12

Applicant: IBM

Inventor： DESPONT MICHEL ,  DUERIG URS T ,  GROGG DANIEL ,  KNOLL ARMIN W ,  KOREN ELAD

IPC: H01H1/00 ,  B81B3/00 ,  B81B5/00 ,  H01H59/00

Abstract: An electromechanical switch comprises a first electrode 11 comprising layers 21 of a first 2D layered material exhibiting a first surface, and a second electrode 12 comprising layers 22 of a second 2D layered material exhibiting a second surface vis-Ã -vis or face to face with the first surface. Each of the 2D materials is electrically conducting and an actuator actuates one of the electrodes to modify a distance between the surfaces, to modify electrical conductivity transverse to the surfaces and enable current modulation between the electrodes. The electrodes may comprise a drain and a source and the actuator a gate electrode (fig 1,13). The surfaces may move parallel to each other, actuation modifying an overlap between them or move transversely with actuation modifying a transverse distance (fig 1, d). An active region comprising one of the surfaces may be surrounded by and level with an inactive region of insulating material (fig 10B, S5) such as hexagonal boron nitride. An actuatable electrode may pivot, flex, rotate and/or slide and comprise an anchored beam. Source and drain electrodes may be side-by-side and parallel to each other and bridged by a third electrode (fig 13, 122) that can rotate (fig 15). The 2D layer may comprise graphene, graphite, BN, MoS2, WS2, MoSe2, NbSe2 NbS2, NbTe2, TaS2, TaTe2 or TiSe2. Actuation may be electrostatic, piezoelectric, magnetic, by thermal deformation, or by material stress. The switch may be micro-electromechanical or nano-electromechanical.

公开(公告)号：GB2506410A

公开(公告)日：2014-04-02

申请号：GB201217389

申请日：2012-09-28

Applicant: IBM

Inventor： DELLMANN LAURENT A ,  DESPONT MICHEL ,  GROGG DANIEL ,  SEBASTIAN ABU

IPC: H01H1/00

Abstract: A nanoelectromechanical NEM switch comprises two electrodes 12, 18. At least one of the electrodes 18 has an active layer 10 thereon and one of the electrodes 12 is movable along a direction z, to a position where it contacts the other electrode 18 at a contact point P. The active layer exhibits a conductive pathway 16 which extends in direction z to enable conduction between the electrodes in position P and is confined to a region R1 of the active layer having nano-scale dimensions in a plane x, y perpendicular to direction z. The active layer on one electrode can comprise a protrusion (fig 8, 16p) in region R1 that protrudes towards the other electrode. The active layer can be resistive and the conductive path 16 extend through the layer in direction z in region R1,which can be contiguous with a surrounding region R2 having no conductive pathway. The properties of region R1 can be characteristic of a conditioning process comprising application of voltage or current pulses whilst the contacts are closed. The active layer can comprise several layers of materials including metallic layers and materials such as amorphous, diamond-like, hydrogenated or doped carbon; a phase-change material such as GeSbTe or GeTe or an oxide of Hf, W, Ta, Ti, Si or Zr.

公开(公告)号：GB2505467A

公开(公告)日：2014-03-05

申请号：GB201215513

申请日：2012-08-31

Applicant: IBM

Inventor： DESPONT MICHEL ,  GROGG DANIEL ,  HAGLEITNER CHRISTOPH ,  PU YU

IPC: H03K19/00 ,  H01H1/00

Abstract: The invention refers to a dynamic logic gate comprising a nano-electro-mechanical switch (NEMS), preferably a four-terminal NEM switch (4T-NEMS). The NEMS comprises a cantilever beam adapted to flex in response to an actuation voltage applied between the body and the gate of the device. The invention further refers to dynamic logic cascade circuits comprising such dynamic logic gates. In particular, embodiments of the invention concern dynamic logic cascade circuits comprising single or dual rail dynamic logic gates. A NEMS allows zero leakage current when it is off so the pre-charged signal node in a dynamic logic gate can safely retain its charge, without the requirement for keeper transistors as in prior art CMOS dynamic logic circuits. The proposed NEMS adiabatic dynamic logic avoids both the leakage energy loss and the threshold voltage residue charge loss; it consumes only the adiabatic energy loss. As a result, an ultra-low energy loss close to zero is achieved.