公开(公告)号：JP2000100822A

公开(公告)日：2000-04-07

申请号：JP26415999

申请日：1999-09-17

Applicant: IBM ,  SIEMENS AG

Inventor： CLEVENGER LARRY ,  FILIPPI JR RONALD G ,  GAMBINO JEFFREY ,  GIGNAC LYNNE ,  HURD JEFFERY L ,  HOINKIS MARK ,  IGGULDEN ROY C ,  MEHTER EBRAHIM ,  RODBELL KENNETH P ,  SCHNABEL FLORIAN ,  WEBER STEFAN J

IPC: H01L23/52 ,  H01L21/283 ,  H01L21/3205 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To limit the forming quantity of an inter-metallic compound by sticking a wetting layer containing first metal which is brought into contact with an insulator to a recessed part, a uniform barrier layer on it, and a second metallic conduction layer on it at a temperature which is lower than that, at which the inter-metal compound is generated by means of diffusing first and second metals on the barrier layer. SOLUTION: Barrier layers 20 of nonreactive compounds are formed on wetting layers 18, where the metal of titanium(Ti) is evaporated by CVD on the sidewalls of the recessed parts 12 of an insulating layer 10 on the substrate 11 of a silicon water. The barrier layers 20 are formed of an arbitrary material, whose diffusion temperature of the constitution elements of the wetting layers 18 and the metallic layers, is higher than the reaction temperature of the constitution elements, and titanium nitride(TiN) is desirable. It is thicker than the sidewalls of the wetting layers 18 and is more uniform. Then, the recessed parts 12 are completely filled with the conduction layers a metal such as aluminum(Al). In the reaction between Ti of the wetting layers 18 and Al of the conduction layers 22, Ti and Al are unable to diffuse at a temperature lower than 430 deg.C, and they are brought into contact with each other and do not react.

公开(公告)号：JP2000091271A

公开(公告)日：2000-03-31

申请号：JP14860499

申请日：1999-05-27

Applicant: IBM

Inventor： DEHAVEN PATRICK W ,  GOLDSMITH CHARLES C ,  HURD JEFFERY L ,  SAAYANARAYANA KAJA ,  MICHAEL S REGARE ,  FRED D PERFECT

IPC: H01L21/28 ,  C25D5/50 ,  C25D7/00 ,  H01L21/288 ,  H01L21/3205 ,  H01L23/52 ,  H05K1/09 ,  H05K3/22

Abstract: PROBLEM TO BE SOLVED: To obtain a method for manufacturing an electronic circuit by controlling growth of particle structures of a thin film after deposited on a substrate. SOLUTION: The present invention provides a method for depositingly forming a metallic thin film having different micro-structures on a substrate. The method, which controls particle growth in the micro-structures, includes steps of (a) depositingly forming the metallic thin film having the micro- structures of fine particles on the substrate, and (b) heating the metallic thin film at 70-100 deg.C for at least 5 minutes to change the fine particle micro- structures to stable micro-structures of large particles. A result of X-ray diffraction of an electroplated copper thin film having micro-structures of large particles is illustrated.

公开(公告)号：JPH11330244A

公开(公告)日：1999-11-30

申请号：JP9247299

申请日：1999-03-31

Applicant: SIEMENS AG ,  IBM

Inventor： CLEVENGER LAWRENCE A ,  FILIPPI RONALD G ,  HOINKIS MARK ,  HURD JEFFERY L ,  IGGULDEN ROY C ,  PALM HERBERT ,  POETZLBERGER HANS W ,  RODBELL KENNETH P ,  SCHNABEL FLORIAN ,  WEBER STEFAN ,  MEHTER EBRAHIM A

IPC: H01L21/28 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532

Abstract: PROBLEM TO BE SOLVED: To provide an interconnection with a damascene structure having an improved reliability, by using a liner for surrounding or sealing a conductor to give random crystal grain orientation to a conductive material. SOLUTION: A layer 137 is deposited on an insulating layer 130. A layer for lining the wall and the bottom of the contact opening functions as a base coat or liner for a conductive layer 138 to be subsequently deposited to fill the contact opening, and the degree of crystal grain orientation randomness of a material that fills the damascene structure is expanded. A parameter used for depositing a TiN layer is selected to expand the degree of base coat crystal grain orientation randomness and/or amorphous characteristics. The liner has an enough thickness to ensure the random crystal grain orientation of the conductive material to be subsequently deposited. Thus, the interconnection in an IC having the improved reliability can be obtained.

公开(公告)号：HK1036150A1

公开(公告)日：2001-12-21

申请号：HK01106779

申请日：2001-09-26

Applicant: IBM ,  SIEMENS AG

Inventor： CLEVENGER LARRY ,  FILIPPI RONALD G ,  GAMBINO JEFFREY ,  GIGNAC LYNNE ,  HURD JEFFERY L ,  HOINKIS MARK ,  IGGULDEN ROY C ,  MEHTER EBRAHIM ,  RODBELL KENNETH P ,  SCHNABEL FLORIAN ,  WEBER STEFAN J

IPC: H01L20060101 ,  H01L