公开(公告)号：JPH07302759A

公开(公告)日：1995-11-14

申请号：JP3195295

申请日：1995-02-21

Applicant: IBM

Inventor： JIYONASAN DANIERU CHIYATSUPURU ,  RICHIYAADO ANSONII KONCHI ,  JIEEMUZU ANSONII ONIIRU ,  NARAYAANA BUII SARUMA ,  DONARUDO RESURII UIRUSON ,  JIYASUTEIN WAI CHIYOU UON

IPC: H01L21/205 ,  C23C16/40 ,  C23C16/44 ,  C23C16/448 ,  C23C16/52

Abstract: PURPOSE: To adjust a vapor send-out system, by bringing out a control signal for sending aluminum triisopropoxide(ATI) to a reactor or an exhaust pipe, by using a Fourier transform infrared(FTIR) spectrometer, in response to presence of contaminants and decomposition products in vapor stream. CONSTITUTION: When an FTIR spectrometer 5 analyzes reaction product vapor flowing in an IR cell 14, an information which shows whether contaminates or decomposition products exist is give to a process controller. Depending upon the composition of reaction product vapor which is harmful to a reactor or a workpiece in the reactor, the controller operates a valve 7, and stream of the reaction product vapor is changed so as to make it flow from a pipe 12 to a pump 13. When composition of the reaction product vapor is proper, the valve 7 is operated, and the reception product vapor is sent from a pipe 10 to a CVD reactor 11 to be fraught into reaction with the workpiece 15. Thereby, the reactor and the workpiece can be protected from the contaminants.

公开(公告)号：JPH08188878A

公开(公告)日：1996-07-23

申请号：JP25256195

申请日：1995-09-29

Applicant: IBM

Inventor： SUTEIIBUN JIYOOJI BAABII ,  JIYONASAN DANIERU CHIYATSUPURU ,  RICHIYAADO ANSONII KONTEI ,  RICHIYAADO SHIYAO ,  JIEEMUSU ANSONII ONEIRU ,  NARAYAANA BUII SARUMA ,  DONARUDO REZURII UIRUSON ,  JIYASUTEIN WAI CHIYOU UON ,  SUTEIIBUN POORU ZUHOSUKI

IPC: C23C16/40 ,  C23C16/448 ,  C23C16/52 ,  H01L21/205 ,  H01L21/31 ,  H01L21/316

公开(公告)号：JPH0766300A

公开(公告)日：1995-03-10

申请号：JP16653894

申请日：1994-07-19

Applicant: IBM

Inventor： JIYONASAN DANIERU CHIYATSUPURU ,  RICHIYAADO ANSONII KONTEI ,  JIEFURII PIITAA GANBIINO

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE: To obtain a simplified charge storage capacitor having a high dielectric constant dielectric by depositing a dielectric having high dielectric constant, selected from a group of Ta2 O5 , SrTiO3 and BaTiO3 , on a conductive oxide by CVD and then forming a counter electrode on the dielectric layer. CONSTITUTION: A conductive oxide 32 is deposited and a dielectric 34 having high dielectric constant is blanket deposited thereon. High dielectric constant dielectric of the dielectric layer 34 is selected from a group of tantalum oxide (Ta2 O5 ), strontium titanate (SrTiO3 ) and barium titanate (BaTiO3 ). The dielectric layer 34 is formed by CVD. A counter electrode layer 36 is then formed of tungsten (W), platinum (Pt) or titanium nitride (TiN) by CVD sputtering or deposition thus obtaining a simplified charge storage capacitor having a high dielectric constant dielectric.

公开(公告)号：JPH07188932A

公开(公告)日：1995-07-25

申请号：JP25699394

申请日：1994-10-21

Applicant: IBM

Inventor： JIEEMUZU ANSONII ONIIRU ,  MAIKERU REEN PATSUSOU ,  TEINA JIEEN KOTORAA ,  JIYONASAN DANIERU CHIYATSUPURU ,  RICHIYAADO ANSONII KONTEI ,  JIYOISHI SHIN

IPC: G01N21/33 ,  C23C16/44 ,  C23C16/455 ,  C23C16/52 ,  C23F4/00 ,  G01N21/35 ,  H01L21/205 ,  H01L21/302 ,  H01L21/31 ,  H01L31/00 ,  H01L21/3065

公开(公告)号：JPH06326359A

公开(公告)日：1994-11-25

申请号：JP3967894

申请日：1994-03-10

Applicant: IBM

Inventor： JIYONASAN DANIERU CHIYATSUPURU ,  SESHIYADORI SABANNA ,  MANIYU JIYAMUNADASU TEJIYUWANI

IPC: H01L21/20 ,  G02B6/42 ,  H01L29/06 ,  H01L31/0352 ,  H01L31/105 ,  H01L31/12 ,  H01L33/06 ,  H01L33/34 ,  H01L33/00

Abstract: PURPOSE: To provide a semiconductor light emission/detection device which realizes the optical interconnection in a silicon base semiconductor device. CONSTITUTION: A semiconductor light emission/detection device comprises the first doped silicon layer 10, the first intrinsic silicon epitaxial layer 15 formed on the layer 10, at least one quantum dot 20 buried in the intrinsic silicon epitaxial layer 15 and the second doped silicon layer 30 formed on the second intrinsic silicon epitaxial layer 25.