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    Process for forming a resist mask
    1.
    发明授权
    Process for forming a resist mask 失效
    抗蚀剂掩模的形成方法

    公开(公告)号：US3873313A

    公开(公告)日：1975-03-25

    申请号：US36263773

    申请日：1973-05-21

    Applicant: IBM

    Inventor： HORST RICHARD S ,  KAPLAN LEON H ,  MERRITT DAVID P

    IPC: G03F7/11 ,  H01L21/00 ,  H01L23/29 ,  G03C5/00

    CPC classification number: H01L21/00 ,  G03F7/11 ,  H01L23/293 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A resist mask formation process in which a first layer of photoresist is applied to a substrate, blanket exposed to react the photoactive material in the resist and postbaked. A second layer of photoresist is then applied, exposed patternwise, and portions of the substrate are uncovered by solvent development of the resist layers.

    Abstract translation: 抗蚀剂掩模形成工艺，其中将第一层光致抗蚀剂施加到基底，橡皮布暴露以使抗蚀剂中的光活性材料反应并进行后烘烤。 然后施加第二层光致抗蚀剂，以图案方式露出，并且通过抗蚀剂层的溶剂显影来覆盖基底的一部分。

    2.
    发明专利
    未知

    公开(公告)号：DE2747669A1

    公开(公告)日：1978-05-24

    申请号：DE2747669

    申请日：1977-10-25

    Applicant: IBM

    Inventor： KAPLAN LEON H ,  VISWANATHAN NUNGAVARAM S ,  ZIMMERMAN STEVEN M

    IPC: H05K3/06 ,  G03F7/42 ,  H01L21/027 ,  H01L21/30 ,  H05K3/22 ,  H01L21/312

    Abstract: Dissolution of an organic layer from a substrate is achieved by treatment with a mixt. of a persulphate and conc. sulphuric acid. The mixt. pref. contains 13-50g alkali persulphate (esp. K persulphate) per 100 ml. conc. sulphuric acid. Treatment can be carried out once or more times, followed by washing with water and drying. The process is claimed for use for the removal of polymeric organic photoresists from semiconductor substrates. These materials are used in the prodn. of printed circuits, exposure masks and microelectronic circuits. They can be negative photoresists, e.g. sensitised vinyl cinnamate polymers and partially cyclised poly-cis-isoprene polymers, or positive photoresists, e.g. diacetone-sensitised phenol/HCHO resins, polymethyl methacrylate polymers and copolymers and polysulphone polymers. No special safety precautions are necessary and there are no harmful side-effects on the prods. In an example, a soln. of 700g K persulphate in 2 l conc. sulphuric acid was used for the removal of a positive photoresist of cresol/HCHO novolak sensitised with orthoquinone-diazide on a primed, surface-oxidised Si wafer.

    HIGH INTEGRITY ELECTRICAL INSULATING LAYER
    3.
    发明专利
    HIGH INTEGRITY ELECTRICAL INSULATING LAYER 未知

    公开(公告)号：CA974153A

    公开(公告)日：1975-09-09

    申请号：CA151676

    申请日：1972-09-14

    Applicant: IBM

    Inventor： KAPLAN LEON H ,  MONTILLO FRANCIS J

    IPC: H01L29/78 ,  H01L21/283 ,  H01L21/316 ,  H01L21/336 ,  H01L23/29 ,  H01L29/00

    Abstract: 1407222 Making semiconductor devices INTERNATIONAL BUSINESS MACHINES CORP 30 Aug 1972 [27 Sept 1971] 40157/72 Heading H1K An oxide layer is formed on an exposed surface of a silicon body by heating the body in an oxidizing atmosphere that includes, except if desired during the formation of a minor part of the thickness of the oxide layer immediately adjacent the silicon surface, sufficient additive such that at the temperature concerned, the layer, except the said minor part if present, is formed as a liquid and contains the additive as a dopant. The additive may comprise compounds of phosphorus and boron, which inhibit ion migration and which may be derived, for example, by adding POCl 3 or BBr 3 to the oxidizing atmosphere. The concentration of the additive in the oxide may be a few tenths of a mole per cent, but is preferably in the range 1À3 to 2À1 mole per cent. To prevent inversion at the semiconductor surface a minor part of the layer, e.g. 50Š, comprising the oxide without additive, is first formed on the semiconductor, or alternatively on opposite conductivity type additive may be added to compensate for any diffusion of the dopant into the semiconductor. In an example, chemically cleaned P-type Si wafers are preoxidized at 1000‹ C. in dry oxygen flowing at 800 cc. per minute for 4 minutes. The wafers are then exposed to a mixture of oxygen containing 0À8 parts per million POCl 8 for 19- 52 minutes. The resultant mixed SiO 2 -P 2 O 5 layers are formed as a liquid and may be 300- 500Š thick. The method may be used to form the gate insulation of an IGFET.

    Photoresist removal from semiconductor - using persulphate and conc. sulphuric acid, avoiding harmful side-effects and need for special precautions
    6.
    发明专利
    Photoresist removal from semiconductor - using persulphate and conc. sulphuric acid, avoiding harmful side-effects and need for special precautions 未知

    公开(公告)号：FR2371705A1

    公开(公告)日：1978-06-16

    申请号：FR7731531

    申请日：1977-10-07

    Applicant: IBM

    Inventor： KAPLAN LEON H ,  VISWANATHAN NUNGAVARAM S ,  ZIMMERMAN STEVEN M

    IPC: H05K3/06 ,  G03F7/42 ,  H01L21/027 ,  H01L21/30 ,  G03C1/495 ,  H01L21/312

    Abstract: Dissolution of an organic layer from a substrate is achieved by treatment with a mixt. of a persulphate and conc. sulphuric acid. The mixt. pref. contains 13-50g alkali persulphate (esp. K persulphate) per 100 ml. conc. sulphuric acid. Treatment can be carried out once or more times, followed by washing with water and drying. The process is claimed for use for the removal of polymeric organic photoresists from semiconductor substrates. These materials are used in the prodn. of printed circuits, exposure masks and microelectronic circuits. They can be negative photoresists, e.g. sensitised vinyl cinnamate polymers and partially cyclised poly-cis-isoprene polymers, or positive photoresists, e.g. diacetone-sensitised phenol/HCHO resins, polymethyl methacrylate polymers and copolymers and polysulphone polymers. No special safety precautions are necessary and there are no harmful side-effects on the prods. In an example, a soln. of 700g K persulphate in 2 l conc. sulphuric acid was used for the removal of a positive photoresist of cresol/HCHO novolak sensitised with orthoquinone-diazide on a primed, surface-oxidised Si wafer.

    9.
    发明专利
    未知

    公开(公告)号：DE2243285A1

    公开(公告)日：1973-04-05

    申请号：DE2243285

    申请日：1972-09-02

    Applicant: IBM

    Inventor： KAPLAN LEON H ,  MONTILLO FRANCIS JOSEPH

    IPC: H01L29/78 ,  H01L21/283 ,  H01L21/316 ,  H01L21/336 ,  H01L23/29 ,  H01L29/00 ,  H01B17/62

    Abstract: 1407222 Making semiconductor devices INTERNATIONAL BUSINESS MACHINES CORP 30 Aug 1972 [27 Sept 1971] 40157/72 Heading H1K An oxide layer is formed on an exposed surface of a silicon body by heating the body in an oxidizing atmosphere that includes, except if desired during the formation of a minor part of the thickness of the oxide layer immediately adjacent the silicon surface, sufficient additive such that at the temperature concerned, the layer, except the said minor part if present, is formed as a liquid and contains the additive as a dopant. The additive may comprise compounds of phosphorus and boron, which inhibit ion migration and which may be derived, for example, by adding POCl 3 or BBr 3 to the oxidizing atmosphere. The concentration of the additive in the oxide may be a few tenths of a mole per cent, but is preferably in the range 1À3 to 2À1 mole per cent. To prevent inversion at the semiconductor surface a minor part of the layer, e.g. 50Š, comprising the oxide without additive, is first formed on the semiconductor, or alternatively on opposite conductivity type additive may be added to compensate for any diffusion of the dopant into the semiconductor. In an example, chemically cleaned P-type Si wafers are preoxidized at 1000‹ C. in dry oxygen flowing at 800 cc. per minute for 4 minutes. The wafers are then exposed to a mixture of oxygen containing 0À8 parts per million POCl 8 for 19- 52 minutes. The resultant mixed SiO 2 -P 2 O 5 layers are formed as a liquid and may be 300- 500Š thick. The method may be used to form the gate insulation of an IGFET.

    10.
    发明专利
    未知

    公开(公告)号：DE3481786D1

    公开(公告)日：1990-05-03

    申请号：DE3481786

    申请日：1984-10-11

    Applicant: IBM

    Inventor： KAPLAN LEON H ,  KAPLAN RICHARD DEAN

    IPC: H01L21/027 ,  G03F7/038 ,  G03F7/30 ,  G03F7/36

    Abstract: A process for producing a resist pattern by dry development using a resist comprising from 70 to 50% by weight of a novolac resin and from 30 to 50% by weight of a poly(ether pentene sulfone) is described.

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