公开(公告)号：GB2632957A

公开(公告)日：2025-02-26

申请号：GB202416053

申请日：2023-01-17

Applicant: IBM

Inventor： ADAM COLLURA ,  MICHAEL ROMAIN ,  WILLIAM HUOTT ,  PAWEL OWCZARCZYK ,  CHRISTIAN JACOBI ,  ANTHONY SAPORITO ,  CHUNG-LUNG SHUM ,  ALPER BUYUKTOSUNOGLU ,  TOBIAS WEBEL ,  MICHAEL CADIGAN JR ,  PAUL LOGSDON ,  SEAN CAREY ,  KARL ANDERSON ,  MARK CICHANOWSKI ,  STEFAN PAYER

IPC: H02H9/04 ,  G05F1/571 ,  H02H3/20

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. The method includes detecting a region, such as an individual processor, of a processor chip exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life. The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltage spikes back to within some pre-specified range. The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.