公开(公告)号：WO2011064372A3

公开(公告)日：2011-08-11

申请号：PCT/EP2010068435

申请日：2010-11-29

Applicant: IBM ,  IBM UK ,  ROSSNAGEL STEPHEN ,  CABRAL JR CYRIL ,  MURRAY CONAL EUGENE ,  WISNIERFF ROBERT LUKE ,  KOESTER STEVEN JOHN ,  RODBELL KENNETH PARKER ,  GORDON MICHAEL ,  YAU JENG-BANG

Inventor： ROSSNAGEL STEPHEN ,  CABRAL JR CYRIL ,  MURRAY CONAL EUGENE ,  WISNIERFF ROBERT LUKE ,  KOESTER STEVEN JOHN ,  RODBELL KENNETH PARKER ,  GORDON MICHAEL ,  YAU JENG-BANG

IPC: G01T1/02

CPC classification number: G01T1/026

Abstract: A system for determining an amount of radiation includes a dosimeter configured to receive the amount of radiation, the dosimeter comprising a circuit having a resonant frequency, such that the resonant frequency of the circuit changes according to the amount of radiation received by the dosimeter, the dosimeter further configured to absorb RF energy at the resonant frequency of the circuit; a radio frequency (RF) transmitter configured to transmit the RF energy at the resonant frequency to the dosimeter; and a receiver configured to determine the resonant frequency of the dosimeter based on the absorbed RF energy, wherein the amount of radiation is determined based on the resonant frequency.

Abstract translation: 用于确定辐射量的系统包括配置成接收辐射量的剂量计，剂量计包括具有谐振频率的电路，使得电路的谐振频率根据剂量计接收的辐射量而变化， 剂量计进一步被配置为吸收电路的谐振频率处的RF能量; 射频（RF）发射器，其被配置为将所述谐振频率处的所述RF能量发射到所述剂量计; 以及接收器，被配置为基于吸收的RF能量确定剂量计的谐振频率，其中基于谐振频率确定辐射量。

公开(公告)号：JPH11284220A

公开(公告)日：1999-10-15

申请号：JP5222499

申请日：1999-03-01

Applicant: IBM

Inventor： CHU JACK O ,  ISMAIL KHALID EZZELDIN ,  KOESTER STEVEN JOHN ,  KLEPSER BERND-ULRICH H

IPC: H01L31/10 ,  H01L27/144 ,  H01L31/0312 ,  H01L31/0352

Abstract: PROBLEM TO BE SOLVED: To simply integrate a high-speed and high-response photo detector in a monolithic form, by the method wherein a quantum well layer functions as a conductive channel so that a spacer layer separates a dopant in a supply layer from the conductive channel. SOLUTION: It comprises a single crystal semiconductor substrate 1, Si1-x Gex buffer layer 2 graded from x=0 to y ranging from 0.1 to 1.0, relaxing Si1-x Gex layer 3 of 0.25-10 μm thick, quantum well layer 4, undoped Si1-y Gey spacer layer 5 and doped Si1-y Gey supply layer 6. The relaxing Si1-x Gex layer 3 functions as an absorption region of a photo detector, the quantum well layer 4 can function as a conductive channel of a field effect transistor and the spacer layer 5 functions so as to separate a dopant in the supply layer from the conductive channel. Thus it is possible to manufacture a photo detector having an elevated speed and response, compared with a bulk Si.

公开(公告)号：JP2011185933A

公开(公告)日：2011-09-22

申请号：JP2011047471

申请日：2011-03-04

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： MICHAEL S GORDON ,  KOESTER STEVEN JOHN ,  RODBELL KENNETH P ,  YAU JENG-BANG

IPC: G01T1/24 ,  H01L31/09

CPC classification number: H01L31/119

Abstract: PROBLEM TO BE SOLVED: To provide a method for radiation monitoring that obtains real time information concerning the amount of radiation.
SOLUTION: A semiconductor device includes: a semiconductor substrate; a buried insulator layer disposed on the semiconductor substrate, the buried insulator layer configured to retain an amount of charge in a plurality of charge traps in response to a radiation exposure by the semiconductor device; a semiconductor layer disposed on the buried insulating layer; a second insulator layer disposed on the semiconductor layer; a gate conducting layer disposed on the second insulator layer; and one or more side contacts electrically connected to the semiconductor layer. The method for radiation monitoring includes: applying a backgate voltage to a radiation monitor, the radiation monitor comprising a field effect transistor (FET); exposing the radiation monitor to radiation; determining a change in a threshold voltage of the radiation monitor; and determining an amount of radiation exposure based on the change in threshold voltage.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种获得关于辐射量的实时信息的辐射监测方法。 解决方案：半导体器件包括：半导体衬底; 设置在所述半导体衬底上的掩埋绝缘体层，所述掩埋绝缘体层被配置为响应于所述半导体器件的辐射暴露而将多个电荷量保持在多个电荷阱中; 设置在所述掩埋绝缘层上的半导体层; 设置在所述半导体层上的第二绝缘体层; 设置在所述第二绝缘体层上的栅极导电层; 以及与半导体层电连接的一个或多个侧触点。 用于辐射监测的方法包括：将背栅电压施加到辐射监测器，所述辐射监测器包括场效应晶体管（FET）; 将辐射监测仪暴露于辐射; 确定辐射监测器的阈值电压的变化; 以及基于阈值电压的变化确定辐射暴露量。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2008205476A

公开(公告)日：2008-09-04

申请号：JP2008038075

申请日：2008-02-19

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KOESTER STEVEN JOHN ,  AMLAN MAJUMDAR ,  HAENSCH WILFRIED ERNST-AUGUST

IPC: H01L29/786 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

CPC classification number: H01L29/66772 ,  H01L21/26586 ,  H01L21/28026 ,  H01L21/28105 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/823878 ,  H01L21/84 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/66545 ,  H01L29/785

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor structure including a gate electrode having a work function variable in the lateral direction. SOLUTION: The semiconductor structure, such as a CMOS structure, includes the gate electrode having the work function variable in the lateral direction. The gate electrode having the work function variable in the lateral direction can be formed using angle inclined ion implantation or a sequent lamination layer method. The gate electrode having the work function variable in the lateral direction brings improved electrical performance to a field-effect transistor device with a non-doped channel. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种半导体结构，其包括在横向上具有可变功函数的栅电极。 解决方案：诸如CMOS结构的半导体结构包括在横向上具有可变功函数的栅电极。 具有在横向方向上变化的功函数的栅电极可以使用角度倾斜离子注入或后续叠层法来形成。 具有在横向方向上变化的功函数的栅电极对具有非掺杂沟道的场效应晶体管器件具有改善的电性能。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2013102203A

公开(公告)日：2013-05-23

申请号：JP2013009395

申请日：2013-01-22

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation

Inventor： KOESTER STEVEN JOHN ,  AMLAN MAJUMDAR ,  HAENSCH WILFRIED ERNST-AUGUST

IPC: H01L29/786 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

CPC classification number: H01L29/66772 ,  H01L21/26586 ,  H01L21/28026 ,  H01L21/28105 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/823878 ,  H01L21/84 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/66545 ,  H01L29/785

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor structure including a gate electrode having a laterally variable work function.SOLUTION: A semiconductor structure, such as a CMOS structure, includes a gate electrode that has a laterally variable work function. The gate electrode that has the laterally variable work function may be formed using an angled ion implantation method or a sequential layering method. The gate electrode that has the laterally variable work function provides enhanced electrical performance within an undoped channel field effect transistor device.

Abstract translation: 要解决的问题：提供一种包括具有横向可变功函的栅电极的半导体结构。 解决方案：诸如CMOS结构的半导体结构包括具有横向可变功函数的栅电极。 具有横向可变功函数的栅电极可以使用成角度离子注入法或顺序分层方法形成。 具有横向可变功函数的栅电极在未掺杂的沟道场效应晶体管器件内提供增强的电性能。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2007123895A

公开(公告)日：2007-05-17

申请号：JP2006290473

申请日：2006-10-25

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： FRANK MARTIN M ,  HUILING SHANG ,  KOESTER STEVEN JOHN ,  OTT JOHN ALBRECHT

IPC: H01L29/161 ,  H01L21/283 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/04 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L21/02052 ,  H01L21/02046 ,  H01L21/28255 ,  H01L21/306 ,  H01L21/31604 ,  H01L29/513 ,  H01L29/66181

Abstract: PROBLEM TO BE SOLVED: To provide a method and a structure, capable of obtaining a germanium system semiconductor device, such as FET and MOS capacitor.
SOLUTION: More specifically, the method for forming the semiconductor device, containing a stack consisting of a dielectric layer and a conductive material on the surface being an upper section or an internal section of a germanium contained material in which a non-oxygen chalcogen is rich (layer or wafer) or both of them is provided. The density of an interface trap is decreased, because undesirable formations of interface compounds at the time of growing the dielectric and thereafter is suppressed, by providing interfaces in which the non-oxygen chalcogen is rich.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供能够获得诸如FET和MOS电容器的锗系统半导体器件的方法和结构。 解决方案：更具体地，在表面上包含由电介质层和导电材料构成的叠层的半导体器件的形成方法，其是含锗材料的上部或内部部分，其中非氧 硫族元素丰富（层或晶片），或者都提供它们。 界面陷阱的密度降低，因为通过提供其中非氧硫属元素富的界面，在电介质生长时不期望的界面化合物的形成被抑制。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2013123066A

公开(公告)日：2013-06-20

申请号：JP2013009396

申请日：2013-01-22

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation

Inventor： KOESTER STEVEN JOHN ,  AMLAN MAJUMDAR ,  HAENSCH WILFRIED ERNST-AUGUST

IPC: H01L29/786 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

CPC classification number: H01L29/66772 ,  H01L21/26586 ,  H01L21/28026 ,  H01L21/28105 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/823878 ,  H01L21/84 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/66545 ,  H01L29/785

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor structure including a gate electrode having a laterally variable work function.SOLUTION: A semiconductor structure, such as a CMOS structure, includes a gate electrode that has a laterally variable work function. The gate electrode that has the laterally variable work function may be formed using an angled ion implantation method or a sequential layering method. The gate electrode that has the laterally variable work function provides enhanced electrical performance for an undoped channel field effect transistor device.

Abstract translation: 要解决的问题：提供一种包括具有横向可变功函的栅电极的半导体结构。 解决方案：诸如CMOS结构的半导体结构包括具有横向可变功函数的栅电极。 具有横向可变功函数的栅电极可以使用成角度离子注入法或顺序分层方法形成。 具有横向可变功函数的栅电极为未掺杂的沟道场效应晶体管器件提供增强的电性能。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2000286413A

公开(公告)日：2000-10-13

申请号：JP2000065262

申请日：2000-03-09

Applicant: IBM

Inventor： CHU JACK OON ,  HAMMOND RICHARD ,  ISMAIL KHALID EZZELDIN ,  KOESTER STEVEN JOHN ,  MOONEY PATRICIA MAY ,  OTT JOHN A

IPC: H01L29/161 ,  H01L21/338 ,  H01L29/10 ,  H01L29/778 ,  H01L29/78 ,  H01L29/812

Abstract: PROBLEM TO BE SOLVED: To make applicable the structure of an epitaxial field effect transistor to the intended uses of high-speed low-noise microwave and quasi-millimetric- wave devices, etc., by integrating into the epitaxial field effect transistor a silicon layer, a germanium layer, and silicon-germanium layers which form jointly a modulatorily doped heterostructure. SOLUTION: After forming on a single-crystal semiconductor substrate 11 a buffer layer 12 including a layer 12A, a layer 12B, and a layer 12C, a p-type doped relaxation silicon-germanium layer 13 is formed on the layer 12C of the buffer layer 12. Then, thereon, as a spacer, a non-doped strained silicon layer 14 is grown epitaxially to grow further on the layer 14 epitaxially a non-doped thin relaxation silicon-germanium layer 15. Subsequently, on the layer 15, there are grown epitaxially in succession a germanium layer 16, a silicon-germanium layer 17, and a silicon-germanium cap layer 18 to form the laminated layer of them.

公开(公告)号：DE112011102011B4

公开(公告)日：2015-10-22

申请号：DE112011102011

申请日：2011-04-12

Applicant: IBM

Inventor： SOLOMON PAUL MICHAEL ,  KOESTER STEVEN JOHN ,  MAJUMDAR AMLAN ,  LAUER ISAAC

IPC: H01L29/66 ,  H01L21/336 ,  H01L29/165 ,  H01L29/739 ,  H01L29/78

Abstract: Verfahren zum Herstellen eines Heteroübergang-Tunnel-Feldeffekttransistors (100), wobei das Verfahren aufweist: Bilden eines Gate-Bereichs (145) auf einer Siliciumschicht (115) eines Silicium-auf-Isolator-Substrats (105, 110); Bilden eines Drain-Bereichs (120) auf der Siliciumschicht (115), benachbart zu dem Gate-Bereich (145); und Bilden eines Source-Bereichs (125) mit vertikalem Heteroübergang (126) benachbart zu dem Gate-Bereich (145), wobei der Source-Bereich (125) mit vertikalem Heteroübergang (126) einen Tunnelweg (140) parallel zu einem Gate-Feld, das mit dem Gate-Bereich (145) verbunden ist, erzeugt.

公开(公告)号：DE112011102011T5

公开(公告)日：2013-03-28

申请号：DE112011102011

申请日：2011-04-12

Applicant: IBM

Inventor： SOLOMON PAUL MICHAEL ,  KOESTER STEVEN JOHN ,  MAJUMDAR AMLAN ,  LAUER ISAAC

IPC: H01L29/739 ,  H01L29/165

Abstract: Beispielhafte Ausführungsformen schließen ein Verfahren zum Herstellen eines Heteroübergang-Tunnel-Feldeffekttransistors (FET) ein, wobei das Verfahren das Bilden eines Gate-Bereichs auf einer Siliciumschicht eines Silicium-auf-Isolator(SOI)-Substrats, Bilden eines Drain-Bereichs auf der Siliciumschicht benachbart zu dem Gate-Bereich und Bilden eines Source-Bereichs mit vertikalem Heteroübergang benachbart zu dem Gate-Bereich aufweist, wobei der Source-Bereich mit vertikalem Heteroübergang einen Tunnelweg parallel zu einem Gate-Feld, das mit dem Gate-Bereich verbunden ist, erzeugt.