公开(公告)号：JPH0817831A

公开(公告)日：1996-01-19

申请号：JP29101294

申请日：1994-11-25

Applicant: IBM

Inventor： KURAUSU DEIITORITSUCHI BEIYAA ,  UIRIAMU RESURII GASURII ,  SUTANREE RICHIYAADO MAAKAREUIT ,  ERITSUKU MENDERU ,  UIRIAMU JIYON PATORITSUKU ,  KIYASARIIN ARISU PERII ,  UIRIAMU ARON PURISUKIN ,  YAKOBU RAIZUMAN ,  POORU MAACHIN SHIYAIBURU ,  CHIYAARUZU RANBAATO SUTANDOREI

IPC: H01L21/3205 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/768

Abstract: PURPOSE: To form a structure with a metal layer and a silicon dioxide layer on a same flat surface on a substrate. CONSTITUTION: A metal layer pattern 72 of Al-Cu is formed on a substrate 70, and a silicon dioxide layer 74 is adhered on it. The upper surface of the substrate is chemically and mechanically polished using a basic slurry containing silica particle until the surfaces of the metal layer pattern 72 and the silicon dioxide layer 74 become essentially the same flat surfaces.

公开(公告)号：JPH06252016A

公开(公告)日：1994-09-09

申请号：JP30328293

申请日：1993-11-10

Applicant: IBM

Inventor： KURAUSU DEIITORITSUCHI BEIYAA ,  RUISU RU CHIEN SUU ,  BIKUTAA JIYOZEFU SHIRUBESUTORI ,  ANDORII ESU YAPUSHIIRU

IPC: H01L21/02 ,  H01L21/20 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/762

Abstract: PURPOSE: To provide a method for forming a defect-free thin semiconductor layer which is formed by wafer adhesion. CONSTITUTION: A silicon substrate 10 having 1st conductivity, diffusion layer 12 formed on the silicon substrate while having a 2nd conductivity type and 2nd etch characteristics, thin epitaxial layer 14 having the 2nd conductivity type and 2nd etch characteristics and 1st wafer having a thin oxide layer 16 formed on the epitaxial layer are prepared, a 2nd wafer 18 having a silicon substrate, for which a thin oxide layer is formed on its surface, is prepared and the 1st and 2nd wafers are adhered. Then, the silicon substrate of 1st wafer is mechanically removed and in order to expose the lower epitaxial layer, the diffusion layer is removed by using the selective low energy dry etch plasma process of etch ratio between 1st and 2nd etch characteristics so as to remove the diffusion layer while minimizing plasma irradiation damage on the exposed epitaxial layer.

公开(公告)号：JPH077075A

公开(公告)日：1995-01-10

申请号：JP4079194

申请日：1994-03-11

Applicant: IBM

Inventor： KURAUSU DEIITORITSUCHI BEIYAA ,  ANDORII SETEIAWAN YAPUSAA

IPC: H01L21/764 ,  H01L21/76 ,  H01L21/762 ,  H01L27/12

Abstract: PURPOSE: To provide a method for separating the lightly-doped silicon islands from each other and from a common substrate, and to provide its product. CONSTITUTION: A substrate 1 is covered by a first epitaxial layer which is heavily doped. The first layer is covered by a second epitaxial layer which is lightly doped. A pair of detached deep trenches 6 and 17, extending to the substrate 1 from the upper surface 7 of the second layer through the first layer, are formed. The inner walls of the trenches are covered by an oxide 8. A pair of reach-through diffusion regions heavily doped, which extend from the upper surface 7 of the first layer are positioned so as to perpendicular to the deep trenches 6 and 17, and they extend completely between the trenches. The first layer connected to the reach through diffusion regions heavily doped is removed by an anisotropic etching process, and the silicon islands are separated by air, except for a part which is brought into contact with the deep trenches 6 and 17 covered by oxide 8. Air isolation is favorably and partially substituted for the other dielectric material.

公开(公告)号：JPS62102543A

公开(公告)日：1987-05-13

申请号：JP21422486

申请日：1986-09-12

Applicant: IBM

Inventor： KURAUSU DEIITORITSUCHI BEIYAA ,  UIRIAMU RESURII GASURII ,  SUTANREE RICHIYAADO MAAKAREUIT ,  ERITSUKU MENDERU ,  UIRIAMU JIYON PATORITSUKU ,  KIYASARIIN ARISU PERII ,  UIRIAMU ARON PURISUKIN ,  YAKOBU RAIZUMAN ,  POORU MAACHIN SHIYAIBURU ,  CHIYAARUZU RANBAATO SUTANDOREI

IPC: H01L21/3205 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/768