-
公开(公告)号:HK1006241A1
公开(公告)日:1999-02-19
申请号:HK98105469
申请日:1998-06-17
Applicant: IBM
Inventor: BROUILLETTE GUY PAUL , DANOVITCH DAVID HIRSCH , LIEHR MICHAEL , MOTSIFF WILLIAM THOMAS , ROLDAN JUDITH MARIE , SAMBUCETTI CARLOS JUAN
Abstract: An interconnect system that has low alpha particle emission characteristics for use in an electronic device includes a semiconductor chip that has an upper surface and spaced apart electrically resistive bumps positioned on conductive regions of the upper surface, the electrically resistive bumps are made of a composite material of a polymer and metal particles, and a substrate that has conductive regions bonded to the electrically resistive bumps in a bonding process wherein the electrically resistive bumps convert to electrically conductive bumps after the bonding process.
-
公开(公告)号:DE68901055D1
公开(公告)日:1992-04-30
申请号:DE68901055
申请日:1989-01-27
Applicant: IBM
Inventor: GATES STEPHEN M , LIEHR MICHAEL , RENIER MICHEL G E G , RUBLOFF GARY W
-
公开(公告)号:DE69315370T2
公开(公告)日:1998-05-28
申请号:DE69315370
申请日:1993-03-12
Applicant: IBM
Inventor: DANA STEPHANE SIMON , ANDERLE MARIANO , RUBLOFF GARY WAYNE , SCHROTT ALEJANDRO GABRIEL , LIEHR MICHAEL
IPC: H01L21/205 , G11B5/73 , H01L21/02 , H01L21/8242 , H01L27/108 , H01L33/00 , G11B5/64 , H01L21/3205
Abstract: The fabrication of rough Si surfaces with control of the roughness density, roughness length scale, and morphology on a nanometer scale is disclosed using 1) a low pressure chemical vapor deposition (CVD) process, typically in the 1 - 5 mTorr range, and 2) initial surface conditions and operating parameters such that initial growth is nucleation-controlled, e.g., using a thermal SiO2 surface which is relatively unreactive to SiH4 at an operating temperature below about 700 DEG C, and typically in the range of 500 - 600 DEG C. This broad temperature window enhances the feasibility of manufacturing rough silicon surfaces with broad applications. Further, various methods are presented for achieving surface pretreatment to control the size and density of the initial nuclei preparatory to the performance of the foregoing fabrication process. In addition, a method is disclosed for producing on a substrate surface, directly and in-situ, a pattern of submicrometer sized dots such that the dot center surface density and the total dot surface area coverage can be precisely controlled, using the features of the fabrication process with additional steps to achieve the desired dots. Particular applications include fabricating rough Si surfaces as (1) electrodes for high capacitance density structures for high density DRAM and (2) as substrates for low-stiction magnetic disks.
-
公开(公告)号:SG72751A1
公开(公告)日:2000-05-23
申请号:SG1997002768
申请日:1997-08-02
Applicant: IBM
Inventor: BROUILLETTE GUY PAUL , DANOVITCH DAVID HIRSCH , LIEHR MICHAEL , MOTSIFF WILLIAM THOMAS , ROLDAN JUDITH MARIE , SAMBUCETTI CARLOS JUAN , SARAF RAVI F
Abstract: An interconnect system that has low alpha particle emission characteristics for use in an electronic device includes a semiconductor chip that has an upper surface and spaced apart electrically resistive bumps positioned on conductive regions of the upper surface, the electrically resistive bumps are made of a composite material of a polymer and metal particles, and a substrate that has conductive regions bonded to the electrically resistive bumps in a bonding process wherein the electrically resistive bumps convert to electrically conductive bumps after the bonding process.
-
公开(公告)号:MY125463A
公开(公告)日:2006-08-30
申请号:MYPI9703540
申请日:1997-08-04
Applicant: IBM
Inventor: BROUILLETTE GUY PAUL , DANOVITCH DAVID HIRSCH , LIEHR MICHAEL , MOTSIFF WILLIAM THOMAS , ROLDAN JUDITH MARIE , SAMBUCETTI CARLOS JUAN , SARAF RAVI F
Abstract: AN INTERCONNECT SYSTEM THAT HAS LOW ALPHA PARTICLE EMISSION CHARACTERISTICS FOR USE IN AN ELECTRONIC DEVICE INCLUDES A SEMICONDUCTOR CHIP (12) THAT HAS AN UPPER SURFACE AND SPACED APART ELECTRICALLY RESISTIVE BUMPS (26,36) POSITIONED ON CONDUCTIVE REGIONS OF THE UPPER SURFACE, THE ELECTRICALLY RESISTIVE BUMPS ARE MADE OF A COMPOSITE MATERIAL OF A POLYMER AND METAL PARTICLES, AND A SUBSTRATE (10) THAT HAS CONDUCTIVE REGIONS BONDED TO THE ELECTRICALLY RESISTIVE BUMPS IN A BONDING PROCESS WHEREIN THE ELECTRICALLY RESISTIVE BUMPS CONVERT TO ELECTRICALLY CONDUCTIVE BUMPS AFTER THE BONDING PROCESS.(FIG.3)
-
公开(公告)号:DE69315370D1
公开(公告)日:1998-01-08
申请号:DE69315370
申请日:1993-03-12
Applicant: IBM
Inventor: DANA STEPHANE SIMON , ANDERLE MARIANO , RUBLOFF GARY WAYNE , SCHROTT ALEJANDRO GABRIEL , LIEHR MICHAEL
IPC: H01L21/205 , G11B5/73 , H01L21/02 , H01L21/8242 , H01L27/108 , H01L33/00 , G11B5/64 , H01L21/3205
Abstract: The fabrication of rough Si surfaces with control of the roughness density, roughness length scale, and morphology on a nanometer scale is disclosed using 1) a low pressure chemical vapor deposition (CVD) process, typically in the 1 - 5 mTorr range, and 2) initial surface conditions and operating parameters such that initial growth is nucleation-controlled, e.g., using a thermal SiO2 surface which is relatively unreactive to SiH4 at an operating temperature below about 700 DEG C, and typically in the range of 500 - 600 DEG C. This broad temperature window enhances the feasibility of manufacturing rough silicon surfaces with broad applications. Further, various methods are presented for achieving surface pretreatment to control the size and density of the initial nuclei preparatory to the performance of the foregoing fabrication process. In addition, a method is disclosed for producing on a substrate surface, directly and in-situ, a pattern of submicrometer sized dots such that the dot center surface density and the total dot surface area coverage can be precisely controlled, using the features of the fabrication process with additional steps to achieve the desired dots. Particular applications include fabricating rough Si surfaces as (1) electrodes for high capacitance density structures for high density DRAM and (2) as substrates for low-stiction magnetic disks.
-
-
-
-
-