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    Vertical type field effect transistor array and method of manufacturing the same
    1.
    发明专利
    Vertical type field effect transistor array and method of manufacturing the same 有权
    垂直型场效应晶体管阵列及其制造方法

    公开(公告)号：JP2008066721A

    公开(公告)日：2008-03-21

    申请号：JP2007222004

    申请日：2007-08-29

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： BREITWISCH MATTHEW ,  SCHROTT ALEJANDRO GABRIEL ,  CHAN HON RAMU

    IPC: H01L29/78 ,  H01L21/336 ,  H01L21/8234 ,  H01L27/088

    CPC classification number: H01L21/823487 ,  H01L27/088

    Abstract: PROBLEM TO BE SOLVED: To provide a vertical type field effect transistor array improved in performance, and a method of manufacturing the same.
    SOLUTION: Each vertical part of each semiconductor pillar in a semiconductor pillar array has a line width greater than a separation distance to a neighboring semiconductor pillar. Alternatively, the array may arbitrarily includes a semiconductor pillar having a different line width within the restriction of the line width and the separation distance. A method of manufacturing the array of the semiconductor pillar uses a pillar mask layer created into a minimum dimension using photolithography, at least one of spacer layers of which is increased in an annular manner before it is used as an etching mask.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种提高性能的垂直型场效应晶体管阵列及其制造方法。 解决方案：半导体柱阵列中的每个半导体柱的每个垂直部分具有大于到相邻半导体柱的间隔距离的线宽。 或者，阵列可以任意地包括在线宽和间隔距离的限制内具有不同线宽的半导体柱。 制造半导体柱阵列的方法使用利用光刻法制成最小尺寸的柱掩模层，其中间隔层中的至少一个在用作蚀刻掩模之前以环形方式增加。 版权所有（C）2008，JPO＆INPIT

    METHOD AND SYSTEM FOR DETECTING PARALLEL MARKETING OF ITEMS
    2.
    发明专利
    METHOD AND SYSTEM FOR DETECTING PARALLEL MARKETING OF ITEMS 失效

    公开(公告)号：JP2000153842A

    公开(公告)日：2000-06-06

    申请号：JP26971999

    申请日：1999-09-24

    Applicant: IBM

    Inventor： AFZALI-ARDAKANI ALI ,  FEGER CLAUDIUS ,  MARTENS MARCO ,  MOSKOWITZ PAUL A ,  SCHROTT ALEJANDRO GABRIEL ,  TRESSER CHARLES P ,  GUTFELD ROBERT JACOB VON

    IPC: B65D23/00 ,  B44F1/12 ,  G06K19/06 ,  G09F3/00

    Abstract: PROBLEM TO BE SOLVED: To prevent illegal resale by forming at least one of coat and code on an item and determining whether the item has been resold from an authorized merchant to an unauthorized merchant by checking the coat or code. SOLUTION: This identifier is extremely difficult if not impossible to remove. The identifier has its allocation and encoded code known only to a manufacturer. When the manufacturer suspects that parallel commercial transaction is occurring, he easily identifies an unauthorized reseller and can take appropriate countermeasures to prevent unauthorized activity. The system 50 includes a processor 51, a special coat/ruled code to be attached onto an item of interest and a detector 53 for determining information contents of the special coat/ scribing code. Although the detector 53 is shown separately from the processor 51, the detector can incorporate the processor therein.

    MANUFACTURE METHOD FOR NOBLE METAL OXIDE AND STRUCTURE FORMED FROM THE NOBLE METAL OXIDE
    6.
    发明专利
    MANUFACTURE METHOD FOR NOBLE METAL OXIDE AND STRUCTURE FORMED FROM THE NOBLE METAL OXIDE 失效

    公开(公告)号：JPH11224936A

    公开(公告)日：1999-08-17

    申请号：JP29838198

    申请日：1998-10-20

    Applicant: IBM

    Inventor： PETER RICHARD DANKOOMU ,  HUMMEL JOHN P ,  LAIBOWITZ ROBERT BENJAMIN ,  DEBORAH AN NEWMEYER ,  KATRINE LIN ZENGER ,  SCHROTT ALEJANDRO GABRIEL

    IPC: H01L21/8247 ,  C23C8/12 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/788 ,  H01L29/792

    Abstract: PROBLEM TO BE SOLVED: To provide a method for improving adhesion and interfacial characteristics between a noble metal part and a high-permeability film by exposing a surface of a noble-metal substrate to oxygen-containing energy and forming a noble-metal oxide film. SOLUTION: One of or a combination of high-density microwave, high-frequency plasma, ion collisions due to oxygen-containing ion beam is selected as an oxygen-containing energy source, and the energy source is used with or without a substrate bias under separate control. The noble metal is selected from among at least on of Pt, Ir, Au, Os, Ag, Pd, Rh and Ru, or selected from among a noble metal alloy of these noble metals. A noble metal oxide film 36 is formed on a noble-metal substrate 34, by exposing a surface of the substrate 34 to the oxygen containing energy source. The oxide layer thickness is normally in a range of 0.4 to 10 nm. In addition, the surface of the noble- metal substrate 34 may be exposed to the oxygen containing energy source for a sufficient time to form an interfacial reinforcement layer, and then a high-permeability material layer 38 may be deposited on the noble-metal substrate 34 with the oxygen containing layer in between.

    7.
    发明专利
    未知

    公开(公告)号：DE69315370D1

    公开(公告)日：1998-01-08

    申请号：DE69315370

    申请日：1993-03-12

    Applicant: IBM

    Inventor： DANA STEPHANE SIMON ,  ANDERLE MARIANO ,  RUBLOFF GARY WAYNE ,  SCHROTT ALEJANDRO GABRIEL ,  LIEHR MICHAEL

    IPC: H01L21/205 ,  G11B5/73 ,  H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L33/00 ,  G11B5/64 ,  H01L21/3205

    Abstract: The fabrication of rough Si surfaces with control of the roughness density, roughness length scale, and morphology on a nanometer scale is disclosed using 1) a low pressure chemical vapor deposition (CVD) process, typically in the 1 - 5 mTorr range, and 2) initial surface conditions and operating parameters such that initial growth is nucleation-controlled, e.g., using a thermal SiO2 surface which is relatively unreactive to SiH4 at an operating temperature below about 700 DEG C, and typically in the range of 500 - 600 DEG C. This broad temperature window enhances the feasibility of manufacturing rough silicon surfaces with broad applications. Further, various methods are presented for achieving surface pretreatment to control the size and density of the initial nuclei preparatory to the performance of the foregoing fabrication process. In addition, a method is disclosed for producing on a substrate surface, directly and in-situ, a pattern of submicrometer sized dots such that the dot center surface density and the total dot surface area coverage can be precisely controlled, using the features of the fabrication process with additional steps to achieve the desired dots. Particular applications include fabricating rough Si surfaces as (1) electrodes for high capacitance density structures for high density DRAM and (2) as substrates for low-stiction magnetic disks.

    Concealed magnetic id code and antitheft tag
    8.
    发明专利
    Concealed magnetic id code and antitheft tag 未知

    公开(公告)号：SG54481A1

    公开(公告)日：1998-11-16

    申请号：SG1997000898

    申请日：1997-03-22

    Applicant: IBM

    Inventor： SCHROTT ALEJANDRO GABRIEL ,  GAMBINO RICHARD JOSEPH ,  GUTFELD VON ROBERT JACOB

    IPC: G01V15/00 ,  G06K19/06 ,  G08B13/24 ,  H05K1/02

    Abstract: The invention relates to a special type of magnetic tag that serves both as an identifier of the article to which it is attached and as an antitheft device. The former attribute is especially important should stolen property be recovered. Identification comes about through the use of an array of individual magnetic elements that are closely spaced, preferably along and perpendicular to an amorphous wire or strip. The magnetic elements can take the form of magnetic ink, high coercivity wire, thin foil, or amorphous wire. The array may be personalized (coded) by leaving out elements of the array or driving selected elements to saturation while others remain demagnetized. The elements can also be in the form of a double array to constitute '1's and '0's to form a code. Reading of the elements is accomplished with a special reading head consisting or one or more small magnetic circuits coupled to one or more pickup loops. A longer length of soft magnetic wire or thin strip is used to trigger an anti-theft alarm when activated by an external field from a magnetic gate.

    Magnetic anti-theft and identification tag
    10.
    发明专利
    Magnetic anti-theft and identification tag 未知

    公开(公告)号：GB2313982A

    公开(公告)日：1997-12-10

    申请号：GB9710025

    申请日：1997-05-19

    Applicant: IBM

    Inventor： SCHROTT ALEJANDRO GABRIEL ,  GAMBINO RICHARD JOSEPH ,  GUTFIELD ROBERT JACOB VON

    IPC: G01V15/00 ,  G06K19/06 ,  G08B13/24 ,  H05K1/02

    Abstract: A magnetic anti-theft and identification tag 206 for concealing in an article such as a SIMM 115, microprocessor, memory or logic chip or board has an amorphous wire 101 and an array of magnetic elements 201 in the form of strips of foil, wire or magnetic ink. The amorphous wire 101 acts as an anti-theft element which is detectable when passing through an interrogation field and the array of elements provides identifying information in the form of a code which can be read by a sensing head 205. The array may be binary coded in various ways, for example by leaving out or magnetizing selected elements or magnetizing elements in opposite directions 203, 204. The elements may be soft elements driven by an applied local a.c. field from the sensor head. Two parallel rows of elements may be used. Various sensor heads are described, consisting of one or more small magnetic circuits coupled to one or more pickup loops. Some heads utilise the Matteucci effect. The wire 101 may form an integral part of the array for coding information.

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