公开(公告)号：EP2024997A4

公开(公告)日：2009-12-16

申请号：EP07797486

申请日：2007-05-16

Applicant: IBM

Inventor： BERNSTEIN KERRY ,  DALTON TIMOTHY JOSEPH ,  GAMBINO JEFFREY PETER ,  JAFFE MARK DAVID ,  KARTSCHOKE PAUL DAVID ,  LUCE STEPHEN ELLINWOOD ,  STAMPER ANTHONY KENDALL

IPC: H01L25/065 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5329 ,  H01L25/50 ,  H01L27/0688 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：WO2007137049A3

公开(公告)日：2008-01-31

申请号：PCT/US2007069002

申请日：2007-05-16

Applicant: IBM ,  BERNSTEIN KERRY ,  DALTON TIMOTHY JOSEPH ,  GAMBINO JEFFREY PETER ,  JAFFE MARK DAVID ,  KARTSCHOKE PAUL DAVID ,  LUCE STEPHEN ELLINWOOD ,  STAMPER ANTHONY KENDALL

Inventor： BERNSTEIN KERRY ,  DALTON TIMOTHY JOSEPH ,  GAMBINO JEFFREY PETER ,  JAFFE MARK DAVID ,  KARTSCHOKE PAUL DAVID ,  LUCE STEPHEN ELLINWOOD ,  STAMPER ANTHONY KENDALL

IPC: H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5329 ,  H01L25/50 ,  H01L27/0688 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon (110A and 110B) from two silicon-on- insulator wafers (110A and 100B), respectively, having devices (130A and 130B), respectively, fabricated therein and bonding them back to back utilizing the buried oxide layers (115). Contacts (210) are then formed in the upper wafer (I00B) to devices (130A) in the lower wafer (100A) and wiring levels (170) are formed on the upper wafer (100B). The lower wafer (100A) may include wiring levels (170). The lower wafer (100A) may include landing pads (230) for the contacts. Contacts to the silicon layer (120) of the lower wafer (100A) may be silicided.

Abstract translation: 一种半导体结构及其制造方法。 该方法包括从分别制造在其中的器件（130A和130B）的两个绝缘体上硅晶片（110A和100​​B）去除后侧硅（110A和110B），并使用掩埋氧化物 层（115）。 接触件（210）然后在上晶片（I00B）中形成在下晶片（100A）中的器件（130A），并且布线层（170）形成在上晶片（100B）上。 下晶片（100A）可以包括布线​​层（170）。 下晶片（100A）可以包括用于触点的着陆焊盘（230）。 与下晶片（100A）的硅层（120）的接触可以被硅化。

公开(公告)号：DE19505748A1

公开(公告)日：1996-08-29

申请号：DE19505748

申请日：1995-02-20

Applicant: IBM

Inventor： KNIGHT STEPHEN ERROLD ,  LUCE STEPHEN ELLINWOOD ,  MCDEVITT THOMAS LEDDY

IPC: G03F7/16 ,  H01L21/027 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/312 ,  G03F7/09 ,  H01L21/469

Abstract: The invention provides a method for substrate preparation prior to applying photoresist to the substrate. A substrate, such as a TEOS-based silicon dioxide or silicon nitride film, is selected and treated with reactive oxygen. The reactive oxygen can comprise ozone or ozone plasma, for example. After treatment of the substrate, the photoresist, preferably an acid-catalyzed photoresist for use with deep UV sensitization, is applied.